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256点FFT源代码
- 256点FFT IP核。包括16bit和8bit两种精度和C、VHDL、Verilog三种语言的多版本、多精度的IP核
cf_fft_256_8
- This is a source code of 256 point fft architecture. This code is also available with opencores-This is a source code of 256 point fft architecture. This code is also available with opencores
fft_256
- 256点的fft，使用verilog硬件描述语言实现，可以在quartus等仿真软件仿真-failed to translate
synth_fft
- fftprocessing can complete 256 pointsFFT.-Hardware Descr iption Language(HDL)is an advanced electronic designmethod．After HDL was put into use，it has draw great attention and gained popularity．The design used Verilog HDL and Schematic for entry tools
fft16
- 256点的FFT/IFFT变换VERILOG代码核。-256-point FFT/IFFT transform VERILOG code that nuclear.
fft256_512_1024
- 基于基2的并行256，1024深度的FFT源代码verilog-Based on radix-2 FFT parallel 256,1024 depth verilog source code
pipelined_fft_256
- verilog编写的并行256点fft代码(Verilog prepared parallel 256 points fft code)
pipelined_fft_64_128_256
- 用verilog实现64点，128点，256点的fft(64 points, 128 points, and 256 points FFT are implemented with Verilog)