搜索资源列表
pcm_verilog
- 这是PCM电话传输系统模型的verilog程序,是一个modlesim开发环境下的工程文件,并有波形仿真结果.-PCM telephone transmission system Verilog model of procedures is a modlesim development environment under the project documents, and a waveform simulation results.
scu_all_fpga
- 大型嵌入式设备FPGA程序，verilog HDL语言，实现DLL和PCM码流分流。-large embedded FPGA procedures, Verilog HDL, DLL and achieve PCM stream diversion.
ss_pcm.tar
- pcm 接口的源代码，有参考价值~verilog语言编写
line_alaw
- 线性PCM到A律pcm的Verilog编码源程序
verilog
- 用verilog语言实现PCM模块功能（pcm发音）-PCM module function (pcm pronunciation) with verilog language
PCMverilog
- 实现了数字通信系统中PCM编码，用Verilog硬件描述语言编程在FPGA上实现的。-Achieved in the PCM coded digital communication system, using Verilog hardware descr iption language programming implemented on the FPGA.
PCM30_Frame_Sync
- 本程序实现了PCM30的帧同步和失步检测，采用verilog编程，包含了工程文件。-This procedure achieved PCM30 frame synchronization and detection step, using verilog programming, includes the project file.
pcm_slv_top
- 实现了verilog语言的pcm编码功能-verilog pcm module
syn_detc
- Verilog语言的同步帧检测模块，适用于pcm通信系统，本模块可检测的同步帧为100110-The synchronization frame detection module implemented use Verilog language,for pcm communication system, the module can detect synchronization frame for 10,011,011
pcm
- verilog 的代码，是pcm采编器，经过验证的，可以用，并且附带上testbench文件。-The verilog code pcm editorial, proven, you can use, and comes on the testbench file.
conv_12_adpcm
- adpcm编码verilog程序,包含pcm转换模块、adpcm编码输出模块-ADPCM coding verilog procedures, including PCM conversion module, ADPCM encoding output module
ss_pcm.tar
- PCM Verilog RTL Reference Code
PCM
- verilog的pcm实现，程序书写规范，值得学习。(The PCM implementation of Verilog, the specification of program writing, is worth learning.)
pcm.tar
- 在FPGA开发板上实现通信中PCM30/32系统的时分复用，编码，解码，串并行转换，以及同步识别(On the FPGA development board, we complete time division multiplexing, encoding, decoding, serial parallel conversion and synchronization identification of PCM30/32 system in communication.)
PDM2PCM.srcs
- use verilog to trans PDM to PCM signal,use vivado