搜索资源列表
Free ARM-7 Core (Verilog) 可跑 uClinux
- 一个 Free 的 ARM-7 Core,是使用 Verilog 编成,综合后占用资源小,可以执行 uClinux 等程序或系统,内附详细说明的 PDF 档及源码 Verilog 编程等.
RISC8.ZIP
- verilog RISC8 cpu CORE 8位RISC CPU 内核源码（VERILOG 版）-verilogRISC8 cpu CORE8-bit RISC CPU core source (VERILOG version)
VERILOG-USB2.0IP-core
- 完整的用VERILOG语言开发的USB2.0 IP核源代码，包括文档、仿真文件-VERILOG language with a complete development of USB2.0 IP core source code, including files, simulation files
FFT_verilog
- verilog实现的FFT变换，经硬件测试其功能与Altera的FFT IP核相近-verilog implementation FFT transform, through hardware, test its functionality with Altera' s FFT IP core similar to
dft
- verilog语言实在点变换DFT源代码，可以配合软核或者其他CPU进行综合FFT变换，也可以单独使用生成module！-verilog language is point FFT transform source code, can tie in with the soft-core CPU, or other integrated FFT transform, it can be used to generate module!
10100MIP
- 以太网10100M IP核Verilog源码(可综合)\以太网10-100M IP核Verilog源码，可综合-10100M IP Ethernet core Verilog source code (which can be integrated) \ 10-100M IP Ethernet core Verilog source code can be integrated
8051core-Verilog
- 8051的verilog内核，fpga里实现8051的话用得上-8051 Verilog cores, fpga achieve useful 8051 words
photo_verilog
- verilog开发的电子相册系统，是基于Altera的FPGA芯片和IP核的设计！-Verilog developed electronic album system is based on Altera s FPGA chip and IP core design!
8086IP
- 开源CPU软核8086的源码,波兰版Verilog源码-8086 soft-core CPU revenue source, the Polish version of Verilog source code
VERILOG_VERSION_PIC16C57
- VERILOG VERSION PIC16C57 是一个用于FPGA模拟PIC16C57的IP核，有帮助文件，介绍了如何测试使用这个IP核。用VERILOG语言编写的。-VERILOG VERSION PIC16C57 is a PIC16C57 for FPGA simulation of the IP core, has helped document describes how to test the use of the IP core.
i2c_core
- I2C core 及testbench（verilog）-I2C core and testbench [verilog]
8051core-Verilog
- 8051内核的verilog描述，对学习EDA和处理器设计很有用的资料。-The disigning of the core 8051 using verilog language.
can
- 基于Verilog HDL 的一个CAN总线IP核。-Based on Verilog HDL a CAN bus IP core.
8051core-Verilog
- mcu 8051 core,simply,easy study and understand,very good for study 8051
c54x_verilog
- TI 的TMS320C54X的DSP的芯片软核verilog源代码，可以帮助初学者深入了解该系列DSP片内资源核结构，值得参考！-TMS320C54X of TI' s DSP chip soft-core verilog source code, can help beginners a better picture of the family of DSP-chip resources, nuclear structure, it is also useful!
8051core-Verilog
- C51 verilog 源代码，可以在逻辑中实现51单片机功能-C51 verilog
sdram_vhd_134
- This code is a SDRAM Controller IP Core for FPGA to interface with SDRAM Memory. This code is Verilog. This code is based Xilinx FPGA Playform.
pci_32tlite_oc
- 嵌入式 pci总线IP core的rtl源代码，用Verilog实现-Embedded pci bus IP core of the rtl source code, Verilog realization of
syn-fifo-verilog
- 用verilog语言写的同步FIFO设计源代码。-The source codes for syn-fifo using verilog language.
Actel8051Core
- Actel 8051 Verilog core