搜索资源列表
Source.rar
- PWM Verilog源代码，可以通过仿真测试,PWM Verilog source code, can be tested through simulation
pwm
- pwm的占空比和死区时间可调的Verilog HDL程序设计和测试-duty cycle of pwm and adjustable dead time of the Verilog HDL design and testing procedures
PWM256
- Verilog 所寫的可程式 PWM 信號產生器. 特點是設定參數時不會產生Glitch現象. 包含二個 .do 檔給 model*sim 幫助編譯及模擬.-A PWM generator writing in Verilog. This module will generate glitch while changing the setting. Including 2 .do files which can help compiling and simulating in the model
FPGA_PWM
- 用Verilog语言编写的FPGA控制PWM的程序.利用码盘脉冲进行调速,进行过简单试验,可用.没有经过长期验证.做简单修改即可应用!-Using Verilog languages FPGA control PWM procedures. Using pulse code disk for governor, conducted a simple test that can be used. Not after a long-term verification. To do a simple
PWM_moto_ctrl
- verilog 代码实现 直流电机PWM控制 内有整个完整工程 和modelsim仿真文件-verilog code for PWM DC motor control to achieve within the whole integrity of engineering and modelsim simulation files
fpga-pwm
- 用verilog 语言写的FPGA子程序，环境是quartus II 7.2 已经在EP1C6Q240上测试过，源码包含仿真文件和仿真结果，本程序可以直接嵌入做子程序使用。-FPGA with the verilog language written subroutines, the environment is quartus II 7.2 has been tested on EP1C6Q240, source code contains the simulation files and s
avalon_pwm_module_v2.51_completed
- 数字PWM的verilog描述，适合于数字控制的DC-DC-Digital PWM s Verilog descr iption, suitable for digital control of DC-DC
PWM
- 使用VERILOG 语言产生PWM波。只需要使用处理器或内核直接配置相应的寄存器就可以输出PWM波。-VERILOG language use PWM wave generated. Only need to use the processor or core directly corresponding configuration register can output PWM wave.
lai_PWM
- FPGA下PWM的Verilog 源码，含目标程序，可直接下载使用，可用在电机控制中-FPGA in Verilog source code under the PWM, including the target program, can be directly downloaded to use, can be used in motor control in
pwm_hw
- sopc nios ii学习资料介绍niosii 开发自定义外设pwm的verilog源代码-Learning sopc nios ii information on the development of custom peripherals niosii the verilog source code pwm
servo_module_worked
- verilog pwm to control servo motor on quartus
PWM
- verilog pwm to control servo motor on quartus, with microprocessor generated from sopc and connected with sram-verilog pwm to control servo motor on quartus
pwm
- verilog实现PWM 开发环境 QUARTUS II7.0-verilog to achieve PWM development environment QUARTUS II7.0
PWM-OUT
- 这里是一个比较好的用Verilog写的通过按键控制PWM输出从而控制小灯亮灭程度的经典例子~！~-Here is a better written in Verilog by using buttons to control the PWM output level of the control of small lights eliminate the classic example of ~! ~
pwm
- 利用Verilog语言产生17路PWM波，控制17路舵机，可以作为IP核添加到AVALON总线上，在nios IDE里用C语言控制。-Using Verilog language production of 17 Road PWM signal to control 17 Servos, can be used as IP core to the AVALON bus, in the nios IDE in control with the C language.
PWM
- 一个用Verilog实现PWM硬件的开发实例 -PWM hardware using Verilog implementation of a development instance
PWM
- verilog描述 PWM IP核 内部包括载波 占空比 和时能寄存器-IP kernel of PWM based on Verilog hdl
PWM
- 利用Verilog语言设计一个PWM控制器，实现：控制器输入时钟1MHz；控制器输出脉冲周期1kHz，脉宽最小调节步长0.1%。(The Verilog language is used to design a PWM controller, which is realized: the controller input clock 1MHz; the controller output pulse cycle 1kHz, and the pulse width minimum adjustme
pwm控制直流电机_verilog_l9110
- VERILOG语言 控制的直流电机 在各大数字逻辑软件如VIVADO ise 均可使用 功能强大 简单易学(motor controlled by VERILOG HDL)
pwm
- 本程序可以实现输出不同占空比（0-100）和不同频率的pwm波形；满足驱动不同硬件的需求；(This program can output PWM waveforms with different duty cycles (0-100) and different frequencies, and meet the needs of different hardware drivers.)