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模擬微電腦設計-七段顯示器字型~~VB
模擬微電腦-七段顯示器字型做計時器的顯示
-Simulation microcomputer design- Seven-Segment Display Font ~ ~ VB simulation microcomputer- Seven-Segment display font to do the timer display
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3 simple AVR assembler code to use seven segment display. These 3 codes realy simple way using seven segment display. these are using in my microprocessor classes.
Wert deney1.asm -> no scan
Wert Deney2.asm -> Scan but BCD
Werrt Deney3.a
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this program will give the functionality of bcd to seven segment display
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BCD 译码器,将8421BCD码转换成七段共阴A~G-Decoder BCD to Seven-Segment 8421BCD code into a total of Yin A ~ G
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BCD码到七段数码管的显示程序,已成功综合,仿真通过-BCD code to the Seven-Segment LED display procedures have been successfully integrated, simulation through
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用VHDL语言在FPGA上实现将十进制bcd码转换成七段led显示码-FPGA using VHDL language to achieve will be converted to decimal bcd yards led seven segment display code
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此實驗中我們將量 測人的反應時間,由於人的反應時間遠比起內建CLOCK的週
期長的多,因此要對CLOCK做除頻的動作方可適用,並方便 於計數 器的計算與
七段顯示器的呈現。實驗內容為,當看到LED亮 起時,立 即做出反應將計數 器停
下,並顯示出當時計數 器之時間。計數 器以兩 位數 BCD counter來 實現並將結果
顯示於七段顯示器上。-Vo
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verilog code for a decoder that converts bcd to seven segment leds
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VHDL语言编写一个BCD计数器并在七段显示数码管上显示的程序,实现了动态扫描,而且很好用-VHDL language a BCD counter and in the seven-segment display digital tube display process to achieve a dynamic scanning, and it just works
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七段显示译码器
因为计算机输出的是BCD码,要想在数码管上显示十进制数,就必须先把BCD码转换成 7 段字型数码管所要求的代码。我们把能够将计算机输出的BCD码换成 7 段字型代码,并使数码管显示出十进制数的电路称为“七段字型译码器”。
-Seven-segment display decoder because the computer output is BCD code, in order to display in the digital tube decimal numbe
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ITS A verilog HDL code for seven segment display .. on different FPGA there are seven segment displays available .. any number from 0 to 9 can be displayed on it .. using this decoder a BCD input is required .. that would be decoded to seven segment
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this a verilog code .. it converts 9 bit integer value to its corresponding twelve bit BCD number that is required as an input to a seven segment decoder or otherwise also an integer that may be represented by binary bits can be changed to its corres
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BCD\七段显示译码器
数码管段显示发光二级管是共阴连结,所以显示高电平有效,即哪一段的驱动信号为高电平,则对应段发亮-BCD \ seven-segment display decoder digital tube sections show light-emitting diode is a link to a total of yin, it showed high and effective, that is what section of the drive signal is h
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A given number (0..999) is tranfered to three seven segment displays using the BCD code.
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BCD码七段译码器CC4511,用VHDL语言来描述CC4511。-BCD code seven-segment decoder CC4511, using VHDL language to describe the CC4511.
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此源代码是基于Verilog语言的持续赋值方式定义的 2 选 1 多路选择器 、阻塞赋值方式定义的 2 选 1 多路选择器、非阻塞赋值、阻塞赋值、模为 60 的 BCD码加法计数器 、模为 60 的 BCD码加法计数器、BCD码—七段数码管显示译码器、用 casez 描述的数据选择器、隐含锁存器举例 ,特别是模为 60 的 BCD码加法计数器,这是我目前发现的最优源代码,应用于解码器领域。-This source code is based on the Verilog language def
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用vhdl语言编译一个码制转换
四位二进制->BCD码,然后将BCD码->七段显示器码。
(1)当输入为0~9的数时,其十位数为0,个位数=输入。
当输入为10~15的数时,其十位数为1,个位数=输入-10。
(2)然后将十位和个位的BCD码转换为七段显示码
-Vhdl language used to compile a binary code system conversion of four-> BCD code, then BCD code->
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3位BCD码的计数显示电路。BCD码计数电路从0计到9然后返回到0从新计数。3位BCD码计数器可以实现从0到999的十进制计数。要将计数过程用七段显示LED数码管显示出来,这里采用动态分时总线切换电路对数码管进行扫描,对数码管依次分时选中进行输出计数的个、十、百位的数据。-3 BCD code count display circuit. BCD code counting circuit count from 0 to 9 and then back to 0 from the new cou
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Create a VHDL code representation of a BCD-to-Seven segment decoder. bcd 7 segment
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vhdl bcd to seven segment
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