搜索资源列表
magnitude
- Verilog HDL: Magnitude For a vector (a,b), the magnitude representation is the following: A common approach to implementing these arithmetic functions is to use the Coordinate Rotation Digital Computer (CORDIC) algorithm. The CORDIC algori
CORDIC_ATAN.rar
- 使用verilog语言完成了基于cordic算法求反正切的计算，精度为8次迭代,Verilog language used to complete based on CORDIC algorithm for arctangent calculation, an accuracy of 8 iterations
cordicDDS
- Cordic算法实现DDS的Verilog 源码,14位精度，非常实用的。-DDS algorithm Cordic the Verilog source code, 14-bit accuracy, very practical.
c20_cordic_computer
- 精通verilog HDL语言编程源码之6--CORDIC数字计算机的设计-Proficient in language programming verilog HDL source of 6- CORDIC digital computer design
4bit_buma_adder
- Verilog作业 ：自己写的源码输入，补码输出的，由状态机控制的四位加法器，为保证时序，加法器模块为超前近位加法器，包含测试台，通过 Modelsim 、Synplify仿真。-Verilog operation: the source code to write their own input, complementary code output by the state machine to control the four adder, in order to ensure timing
atan_lut
- 基于改进的查找表的arctan计算模块，包含完整的VHDL源代码及部分注释．绝对原创！-Arctan calculation module based on improved searching form. The rar package contains complete VHDL source code and some notes. Absolutely original!
tb_cordic
- cordic algorithm in verilog
division_cordic
- verilog code for division based on cordic algorithm
cordic
- vhdl语言编写的cordic算法，实现了cordic的流水线运算。-cordic language vhdl algorithm cordic the pipeline operator.
cordic
- 在QUARTUS环境下，通过Verilog实现cordic，产生sin，cos-In QUARTUS environment, through the Verilog implementation cordic, generate sin, cos
12
- cordic algorithm using verilog code
cordic
- Cordic algorithm implementation in verilog for use in DDS
Cordic_Verilog
- 基于FPGA平台的，坐标旋转数字计算方法Cordic的Verilog描述。可用于计算sin、cos等三角函数。-Cordic in verilog hdl
cordic
- it is a code to implement cordic algorithm in verilog. it calculates sin and cosine of an input angle.
cordic_iterate
- it is a code for cordic algorithm in verilog. it computes sine and cosine of an angle which is the input. it is iterative structure of cordic.
cordic_pipelined
- CORDIC算法的流水线verilog HDL实现，包含modelsim仿真所需的设计文件与testbench。-This is an implementation of CORDIC algorithm in verilog HDL, which contains design code and testbench.
verilog_cordic_core
- A highly configurable 1st quadrant CORDIC core in verilog-Details Name: verilog_cordic_core Created: Sep 14, 2008 Updated: Aug 12, 2011 SVN Updated: Mar 10, 2009 SVN: Browse Latest version: download Statistics: View Other projec
sinwave-genertor
- sinwavw generator code in verilog this will helpful for generating a sinave without using a cordic
serial-cordic-verilog
- implementation of cordic algorithm for many aplication like cos, sinus, polar to rectangular conversion and rectangular to polar conversion. It s written in verilog language and testbench is included
cordic-Vpy
- cordic processor in verilog code is been programmed for fpga. Cordic has rotational matrix with input vectors which can be rotated in phasor plane