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COUNT10
- 一个十进制计数器的vhdl程序,大家可以参考,已经经过编译了
count10
- 用vhdl编写的十进制计数器,内部说明详细。-Prepared using VHDL decimal counter, the internal descr iption in detail.
count10
- 设计一个十进制计数器,具有显示位置随计数时钟在八个数码管中左右滚动的功能。-The design of a decimal counter, with a display position count with the clock in eight digital tube rolling around function.
count10
- 基于Quartus II的十进制加法计数器的项目设计,包含了项目文件和VHDL源代码-Quartus II based on the decimal adder counter the project design, including project documents and VHDL source code
count10
- 基于vhdl语言的10进制的计数器程序,应该有用-Vhdl-based language program for 10 binary counter
count10
- 十进制计数器 自己尝试编辑的,可以-jk flip-flop, try to edit their own, using state machine to achieve, you can-Decimal counter his attempt to edit, and can-jk flip-flop, try to edit their own, using state machine to achieve, you can
count10
- 在quartus环境下,开发的一个10位的计数器,性能可靠,可用作初学者的学习-Quartus environment in the development of a 10-bit counter, reliable performance, can be used for beginners to learn
count10
- 10进制计数器,用于一般的计数、计时等基本元件。-ten counter
COUNT10
- 基于FPGA的一个带有异步复位和同步时钟使能的十进制加法计数器的设计,QuartusII编译通过,采用VHDL语言编写。-Based on FPGA with a reduction of asynchronous and synchronous clock can make the decimal additions counter design, QuartusII compile, USES the VHDL language.
count10
- 利用VHDL编写的十进制计数器,测试成功,可以使用-Use VHDL to write decimal counter, the test is successful, you can use
Chapter4
- Chapter4文件夹: (1)实验1:编码器实验,完整的设计工程文件在CODER文件夹下 (2)实验2:译码器实验,完整的设计工程文件在DECODER7文件夹下 (3)实验3:加法器实验,完整的设计工程文件在ADDER和ALU文件夹下 (4)实验4:乘法器实验,完整的设计工程文件在4BITMULT文件夹下 (5)实验5:寄存器实验,完整的设计工程文件在SHIFT8R和SHIFT8文件夹下 (6)实验6:计数器实验,完整的设计工程文件在COUNT10文件夹下
count10
- 具有占系统资源少、易二次编写、多用户、在线申请、即时开通、多样式、多功能等优点,并提供全面的统计报表-It has accounted for less system resources, easy to write the second, multi-user, online application, immediate opening, multi-style, multi-function, etc., and provide comprehensive statistical repor
counter10
- vhdl编写的十进制计数器,名字叫count10,已配好引脚(VHDL's decimal counter, named count10, has been matched with a pin)