搜索资源列表
omap3530
- omap3530的datasheet，OMAP3530集成ARM+DSP+3D,ARM部分主频达到600MHZ，DSP采用430-MHz TMS320C64x+™ DSP Core，DDR可从128MB扩展到512M，尺寸基于7寸数字屏，主板由核心板和底板构成-omap3530 the datasheet, OMAP3530 integrates ARM+ DSP+3 D, ARM parts of speeds up to 600MHZ, DSP with 430-MHz TMS32
DDR_allegro
- 用allegro画的ddr存储器电路。六层板设计，很好的参考资料-Allegro painting with ddr memory circuit. Six-storey plate design, very good reference
AlteraCycloneIIFPGAStarterBoard
- Altera Cyclone II FPGA Starter Board原理图-Altera Cyclone II FPGA Starter Board Schematic
ddr2_device_operation_timing_diagram_may_07_1
- DDR2时序规范，DDR· DDR2时序规范，DDR·-DDR2 timing norms, DDR DDR2 timing norms, DDR
Twister_DDR_SDRAM_Board_Manual
- Twister DDR EP1C6Q240 FPGA 开发板 原理图，PCB,BOM-Twister Board Documentation Schematics, PCB and BOM Rev. B
DDR
- 关于DDR布线规范，用于指导PCB布线.-Wiring on the DDR specification, PCB layout for
ddr
- DDR 布线规则,pcb工程师应该多学习-DDR routing rules, pcb engineers should study more
DDR-SSO_Simulation_Tutorial
- Document that may help PCB Designers which use the Speed2000: the tool of Allegro Sigrity.