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async
- 用FPGA实现RS232,代码经过测试通过-FPGA implementation using RS232, the code has been tested through
fpga_memory_rev_1_0
- Various memories for Xilinx and Altera FPGA devices. Single-port and Dual-port versions with various numbers of read and write ports. Bundle also includes read-first and write-first varieties with sync and async clocks. All memory compo
async-FIFO
- 采用VHDL实现异步的FIFO程序,是学习FPGA的重点内容-VHDL implementation using asynchronous FIFO procedures, the key elements to learn FPGA! !
async_reset_dff
- 异步复位的D触发器 vhdl fpga xilinx spartan-3e-D flip flop async-reset vhdl fpga xilinx spartan-3e