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SPI
- 经典spi IP 核心 FPGA是实现有说明文档-spi IP based on fpga
spi_vhdl_source
- SPI的VHDL程序，经过quartus验证的，不错！-SPI of the VHDL program, after verification quartus, yes!
FPGA-realise-the-SPI-code
- 用verilog实现的SPI程序，还在modelsim中编写了testbetch文件，非常适合初学者做SPI实验，做一遍包括quartus应用及modelsim仿真都会了-Implementation of SPI with verilog program, also write the testbetch modelsim file, ideal for beginners to do SPI experiment, do it again, including quartus and mod
DEMO_N
- FPGA NOISII程序，包含串口，FLASH,SPI等各种接口的程序，由原理图和VERLOG语言混合编写，非常适合初学者，开发环境为QUARTUS 9.0，芯片为EP2C208QC8N-The the FPGA NOISII program, including serial, FLASH, SPI, interface program, the schematic and VERLOG language prepared by mixing, ideal for beginners, de
SPI_on-quartus
- spi master code for fpga quartus altera
SPI
- spi master code for fpga quartus altera
SPI-verilog
- spi master code for fpga quartus altera
SPI-slave-system
- FPGA时序逻辑设计：串行外围设备接口SPI从设备系统，包括串行时钟线SCK，主机输入/从机输出MISO，主机输出/从机输入MOSI和低电平有效的从机选择线SS。环境为Quartus。-FPGA Timing Logic Design: Serial Peripheral Interface SPI Slave Device System Includes Serial Clock Line SCK, Host Input/Slave Output MISO, Host Output/Slave
tinycpufiles
- TinyCPU源码,使用Verilog编写的资源占用极少的CPU。Quartus工程，可跑在Altera MAXII CPLD上,也很方便移植到其他FPGA上。CPU使用200个逻辑单元，外设(SPI,LCD等)使用180个逻辑单元。 内含汇编编译器源码(VC2008)，可编译CPU对应的汇编文件。-The sourcecode of TinyCPU, which only consumed very few logical cells, written by Verilog. It is