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sha1_verilog
- 安全散列算法的另一种verilog实现,对面积的要求更小,但损失了速度,但在一般系统中,完全可以满足大部分需要了-Secure Hash Algorithm another Verilog realization of the demands of a smaller area, but a loss of speed, but in the general system, fully satisfy the needs of the most
HASH-code-implementation-using-VHDL
- implementation for Secure Hash Algorithm 1 SHA-1 in vhdl language contain no test file.