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digitalic
- 数字IC设计中对与非，或非，SR的vtc特性曲线的仿真HSPICE程序-Digital IC design with non, non, SR characteristics of vtc HSPICE simulation program
pipeline_ADC_PLL
- 该文档提出了一种应用于开关电容流水线模数转换器的CMoS预运放一锁存比较 器．该比较器采用UMC混合／射频0．18肛m 1P6M P衬底双阱CMOS工艺设计，工作电压为 1．8 V．该比较器的灵敏度为0．215 mV，最大失调电压为12 mV，差分输入动态范围为1．8 V，分辨率为8位，在40 M的工作频率下，功耗仅为24．4 ttW．基于0．18 gm工艺的仿真结 果验证了比较器设计的有效性．-A CMOS preamplifier-latch comparator used
Hspice-Digital-BUFFER
- Hspice-输入缓冲器设计网表-Schmitt触发器加反相器-TTL与CMOS电平转换-Hspice模型CMOS35.M-Hspice-input buffer design netlist-Schmitt trigger inverter plus-TTL and CMOS level conversion-Hspice model CMOS35.M
clean_spice
- Creates Hspice characterization files with the adnotations required for autochar. Input: an ASCII file containing the names and pins of the cells. Output: a directory and a "cleaned" Hspice netlist for each cell from the list. It assumes the origin
make_Spice_lib
- Creates the Hspice library file by concatenating the netlists of digital cells from the characterization tree.
digital-circuit-simulation-using-HSPICE
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