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IIRfilterFPGA
- 介绍了IIR 滤波器的FPGA 实现方法,给出了 IIR 数字滤波器的时序控制、延时、补码乘法和累加四个模块的设计方法,并用VHDL和FPGA 器件实现了IIR 数字滤波。-Introduction of the IIR filter FPGA implementation method of IIR digital filter timing control, delay, multiplication and accumulation complement the four modules
IIR
- 毕业设计：基于FPGA的IIR滤波器设计-The design for IIR digital filter based on FPGA
Linux_bc
- 对vga接口做了详细的介绍，并且有一 ·三段式Verilog的IDE程序，但只有DMA ·电子密码锁，基于fpga实现，密码正 ·IIR、FIR、FFT各模块程序设计例程， ·基于逻辑工具的以太网开发，基于逻 ·自己写的一个测温元件（ds18b20）的 ·光纤通信中的SDH数据帧解析及提取的 ·VHDL Programming by Example（McGr ·这是CAN总线控制器的IP核，源码是由 ·FPGA设计的SDRAM控制器，有仿真代码 ·xili
filter_vhdl
- vhdl语言编写的fir和iir滤波器程序。在quartus上仿真通过。-vhdl language program fir and iir filters. Quartus adopted in the simulation.
iir
- IIR50HZ的数字陷波器的FPGA实现-IIR50HZ digital notch filter implementation in FPGA
fir_filter
- 实现滤波器的功能，有限冲激响应（FIR）数字滤波器和无限冲激响应（IIR）数字滤波器广泛应用于数字信号处理系统中。IIR数字滤波器方便简单，但它相位的非线性，要求采用全通网络进行相位校正，且稳定性难以保障。FIR滤波器具有很好的线性相位特性，使得它越来越受到广泛的重视。-Realize the filter function, finite impulse response (FIR) digital filters and infinite impulse response (IIR) dig
VHDL
- 基于FPGA的IIR滤波器的各模块VHDL程序- such as in science and project technique. Compared with FIR digital filter, IIR digital filter can get high selectivity with low factorial.
IIR
- VHDL编写的IIR数字滤波器程序，带通滤波器，也许大家有用-IIR digital filter in VHDL，maybe it can do you some helps
hh
- 此文件是一个Butterworth IIR滤波器的VHDL程序，此滤波器是10阶的，通带频率在2.5MHz——7.5MHz，采样频率为200MHz。此滤波性能不是很好，仅供参考。-This file is the VHDL program in a Butterworth IIR filter, this filter is 10 bands, the frequency of the passband of 2.5MHz- 7.5MHz sampling frequency is 200MHz
eli0011
- 基于VHDL的IIR滤波器设计 用并行处理有耗积分器III的形式设计的二阶IIR巴特沃斯低通数字滤波器 -VHDL-based IIR filter design with parallel processing of lossy integrator III design in the form of second-order IIR Butterworth low-pass digital filter
IIR_Biquad
- that is iir filter design in vhdl and it provides good method in that project designing.
IIR_TDF_II_Top
- a iir filter descr iption by vhdl code in ise for spartan 6
iir_filter
- 用2个2级iir滤波实现的4阶iir滤波，采用16bit量化系数，其中14位有效位，经过与matlab的4阶iir滤波对比，输出结果完全一致。(The 4 order IIR filtering is implemented by two 2-level IIR filtering, and the 16bit quantization coefficient is adopted, in which 14 bit effective bits are compared with the 4 o
E4_7_IIRCas
- 用vhdl语言在xilinx上实现的iir滤波器的设计(Design of IIR filter implemented on Xilinx in VHDL language)