了解ISE平台的基本环境，编译程序，在MC8051 IP核中，要求实现：增加PLL锁相环，扩大内部RAM，定时器，串口和外部中断等资源，并增加乘法器和除法器的功能。-ISE platform to understand the basic environment, compiler, the MC8051 IP core, the requirement to achieve: increased PLL phase-locked loop, expanding the internal RAM

使用的50MHZ分频器，能实现简单的分频，而不用调用IP核DCM，可直接调用到程序中使用-Use 50MHZ divider, to achieve a simple frequency, instead of calling the IP core DCM, can be directly used in the program call to

a vhdl code for divide operation in fpga spartan6