In the logic circuit design, we have to optimize the logic. On the one of method, it is used karnaugh map.-In the logic circuit design, we have to optimize the logic. On the one of method, it is used karnaugh map.

Separated Simplification Method • One has to derive the symmetrical logical equation while using the Karnaugh maps of the logic function • This method, i.e. to perform twice the Boolean simplification for each N-ch and P-ch networks