搜索资源列表
mealy FSM
- mealy fsm 和moore fsm-mealy Fsm and moore Fsm
MEALY
- MEALY状态机的输出是现态和输入的函数.在SRAM控制器状态机中,写有效WE不仅和WRITE状态有关,还和总线命令WRITE_MASK有关.这样,输出WE信号按设计要求表示为现态WRITE和现态输入WRITE_MASK的函数.本程序基于VHDL,开发环境为MAXPLUS2
MEALY
- 状态机设计，用VHDL进行MEALY型状态机的设计。由于两个程序本身有延时现象，本实验进行了改进。
vhdl_model.rar
- VHDL实例，各个方面均有，基本语法，状态机，汉明码，寄存器，步进电机控制器，表决器，多路选择器，译码器等等,VHDL model,include: basic grammer,moore mealy state machine,register,counter,multi,decoder,et..
example2.rar
- 状态机一般分为三种类型：Moore型、Mealy型和混合型。此程序描述了Moore型状态机的基本构成，并配以波形仿真。,State machine will generally be divided into three types: Moore-type, Mealy-type and mixed type. This procedure describes the state machine of the Moore-type basic component, and with simula
VHDL
- 状态机及其VHDL设计,详细介绍了状态机的基本结构、功能和分类，以及有限状态机的一般设计思路与方法、状态机编码方案的恰当选取、Moore和Mealy状态机的本质区别及设计实现-State machine and the VHDL design, described in detail the basic structure of state machines, function and classification, as well as finite state machine of the
(Mealy)
- 状态机的基础,实现状态之间的转换,四个状态在不同情况的转换功能-The basis of state machine to achieve a state of transition between the four different situations in the state of the conversion function
Mealy
- Finit state machine souce code
mealy1
- mealy 状态机的独热编码源程序，接受么mealy状态机的编写规则。-mealy state machine of one-hot encoding source code, you mealy state machine to accept the preparation of the rules.
view
- 计时显示电路,6片七段数码管显示，内部计数器，通过Mealy型状态机实现-Time display circuit, paragraph 6 digital display, internal counter, through the Mealy type state machine to achieve
mealy
- 利用mealy状态机编写的一个8状态的数据检测机，如果输入为0101或者1001则输出为1，否则为0-Prepared using mealy state machine data from an 8-state detector, if the input for the 0101 or 1001 output is 1, otherwise 0
mealymoore
- verilog project for mealy and moore
mealy
- 一个两进程结构的Mealy状态机，其中各状态的转换方式由输入信号DINI控制-failed to translate
mealy
- MEALY fsm source code in vhdl, implemented on fpga
mealy
- mealy型状态机的描写，里面有详细的步骤和源程序-mealy state machine descr iption, there are detailed steps and source code
mealy
- 此代码能够运用状态机的思想实现mealy型的时序逻辑电路-This code can use state machine thought realize mealy type of sequential logic circuit
Mealy-FSM
- 这个程序描述的是模拟并实现了米里有限状态机的功能的实例-This procedure describes the simulation and Mealy finite state machine instance
Mealy
- VerilogHDL语言实现的Mealy序列检测器-VerilogHDL language of Mealy sequence detector
Mealy
- Example of Mealy sequence in VHDL
PROJECT1
- mealy状态机，监测序列，可以检测一个特定的序列(Mealy state machine, monitoring sequence, can detect a specific sequence.)