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微处理机接口电路设计，用verilog写-microprocessor interface circuit design, writing Verilog
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这是8位微处理器的Verilog源代码，可以欠在Flex10k10里面-This is the 8-bit microprocessor Verilog source code, can they owed in Flex10k10
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verilog语言实现的基于MIPS体系结构的微处理器程序，一个时钟周期执行一条指令。,verilog language MIPS-based microprocessor architecture, an implementation of a clock cycle instructions.
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一个32位微处理器的verilog实现源代脉,采用5级流水线和cache技术.-a 32 Microprocessor verilog achieve pulse generation sources, used five lines and cache technology.
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精通verilog HDL语言编程的一个不错的cpu 代码-Verilog HDL language proficiency of a good cpu code
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GPIO (General Purpose Input and Output ports) with microprocessor programmable tri-state bus interface-Use verilog to design a 48 control points that can be programmed to input or output controller
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多周期处理器--verilog写的,欢迎大家来下载，-multicycle microprocessor written with verilog HDL
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mips processor
multicycle non-pipelined microprocessor by verilog
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verilog pwm to control servo motor on quartus, with microprocessor generated from sopc and connected with sram-verilog pwm to control servo motor on quartus
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这是8位微处理器的Verilog源代码，可以欠在Flex10k10里面-This is the 8-bit microprocessor Verilog source code, can they owed in Flex10k10
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用FPGA实现uart的verilog源码，包含standard framing error, parity control and overrun detection.-The UART design was designed from a standard uart function with a read/write microprocessor interface. It includes standard framing error, parity control and ove
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一个微处理器的Verilog代码，根据英文书籍《数字设计与架构》中的例子而写，能够运行MIPS指令，能正确执行跳转指令。通过modelsim仿真，含测试代码。-Verilog code for a microprocessor, according to the English book " Digital Design and Architecture" was written in the example, to run MIPS instructions to jump
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现代计算机与通讯系统电子设备中广泛使用了数字信号处理专用集成电路，它们主要
用于数字信号传输中所必需的滤波、变换、加密、解密、编码、解码、纠检错、压缩、解压缩等操作。这些处理工作从本质上说都是数学运算。从原则上讲，它们完全可以用计算机或微处理器来完成。这就是为什么我们常用C、Pascal 或汇编语言来编写程序，以研究算法的合理性和有效性的道理。-Modern computer and communication systems are widely used in electronic eq
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verilog硬件仿真，实现32-bit RISC微处理器的算数逻辑单仿真元(ALU),实现加减运算、逻辑运算、移位运算。仿真级别为RTL级。-verilog hardware simulation, to achieve 32-bit RISC microprocessor arithmetic logic one simulation element (ALU), to achieve addition and subtraction operations, logic operations
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用Verilog语言写的一个MIPS微处理器，包含常见指令的21条数据通路。-Verilog language used to write a MIPS microprocessor, including the 21 common data path instruction
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基于RISC结构的8位微处理器的verilog源代码，很好的东西。-8-bit RISC-based microprocessor architecture verilog source code, a good thing.
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open risc微处理器的verilog源码。基于sparc架构，可以直接综合。适合cpu的学习-open risc microprocessor verilog source. Based on sparc architecture can be directly integrated. Learning for the cpu
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多周期微处理器设计，verilog，在FPGA上实现，内含实验报告和代码-Multi cycle microprocessor design, Verilog, on the FPGA to achieve, including the experimental report and code
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MIPS R3000 microprocessor core
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this is a file about a microprocessor en multiples sections
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