搜索资源列表
mii-diag.tar
- Linux下通过mii接口控制网卡的工具-Linux with MII interface card control tools
mii
- 以太网PHY端口MII物理层收发程序，可作为开发参考
Mii
- 以C语言利用PIC12C508A读写MII Phy的寄存器-to use C language literacy PIC12C508A MII Phy register
smii-to-mii
- SMII 到 MII 转换的VHDL代码
mii to rmii代码
- mii 接口转rmii接口的verilog代码
mii设计详解
- mii接口的详细讲解
mii接口
- 以太网知识MII接口：本文主要分析MII/RMII/SMII，以及GMII/RGMII/SGMII接口的信号定义，及相关知识，同时本文也对RJ-45接口进行了总结，分析了在10/100模式下和1000M模式下的设计方法。
目前以太网PHY芯片是通过总线MDC/MDIO
- 目前以太网PHY芯片是通过总线MDC/MDIO，但是基本上是通过MAC芯片直接管理的，本代码实现了通过FPGA管理PHY。即由FPGA完成MII管理,At present, Ethernet PHY chip through the bus MDC/MDIO, but basically through the direct management of MAC chip, the code through the FPGA implementation management PHY. FPGA
MII
- MII接口编程,用于收发以太网MAC帧的FPGA实现。-MII interface programming, send and receive Ethernet MAC frame for the FPGA.
ETH
- 该系统通过顶层模块，调用4底层模块实现。4大模块底层模块为：cpu模块、发送模块、接收模块、mii模块-The system top-level module, called the bottom module 4. 4 large modules underlying module: cpu modules, transmit modules, receiver modules, mii module
rmii2mii
- Converter interfaces RMII-MII
MII-Web
- 一个简单的asp数据录入功能，非常实用，包含了各种常用的技巧。-Asp a simple data entry features, very useful, including a variety of commonly used techniques.
48_4.12
- 网络通信中的MII接口 通常将4位nibble数据送出，此程序将4位数据组合成8位数据并行输出（8比特==1个字节）。。完全可用 同时包含84转换-The MII network interface usually sent four nibble data, this procedure will be 4-bit data into 8-bit parallel output data (8 bits == 1 byte). . Completely available at the
opb_ethernetlite
- The Ethernet Lite MAC (Media Access Controller) is designed to incorporate the applicable features described in the IEEE Std. 802.3 Media Independent Interface (MII) specification, which should be used as the definitive specification. Differences bet
LAN8700
- LAN8700具有MII接口的网路PHY驱动器，不带MAC，使用简单-LAN8700 network PHY with MII interface to drive without a MAC, using a simple
MII
- 这个很简单，但是很全面的网路资料，大家快看看哦。-This is simple, but very comprehensive network of information, we quickly take a look oh.
ADM6996F
- ADM6996F交换机说明,MAC can be configured as PCS type MII with 10/100 PHY -The ADM6996F is a high performance, low cost, highly integrated (Controller, PHY and Memory) four-port 10/100 Mbps TX/FX plus two 10/100 MAC port Ethernet switch controller wi
MII_timing
- 用FPGA实现MII的数据传送时序控制,方法简单实用，设计及其精巧-implementation of MII data transmission’s timing control
ethernet_controller_Verilog
- 以太网控制器源码，verilog语言,包含MAC、MII接口-Ethernet controller ,include MAC and MII interfaces ,by verilog
MII
- 以太网MII芯片配置接口的VHDL设计，配置PHY芯片的模块设计-Ethernet MII chip configuration interface VHDL design, configuration PHY chip module design