Verilog HDL的PLI子程序接口，用于与用户C程序在2个方向上传输数据，可用xilinx ISE，quartusii或modelsim仿真，-Verilog HDL PLI subroutine interfaces, for C program with the user in the direction of two transmission of data, available xilinx ISE. quartusii or modelsim simulation,

用count.v和count.c两个文件作为例子，用来说明modelsim的pLI使用方法-using two source files (count.v and count.c ) to demonstrate how to use modesim with PLI