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mux41
- 实现VHDL语言4选1通道，在FPGA下实现。-VHDL language to achieve 4 to 1 channel, in the FPGA to achieve.
mux41
- 四选一多路选择器,功能是控制输出选择四个输入中的其中一个。-Four more than one way selector
Mux41
- 4 to 1 multiplexer vhdl language
mux41
- 用VHDL的程序实现四选一数据选择器的功能，包括电路图以及源码程序-4 election to achieve a data selector function using VHDL procedures, including circuit diagrams and source programs
MUX41
- 四选一的选择器 FPGA源码，包括模块Verilog文件和测试testbench文件-Four one of the selector FPGA source code, including the module Verilog files and test testbench files
mux41
- 四选一数据选择器（四个输入选择一个输出）(Four select a data selector)
mux41
- 利用EDA的Quartus2语言，实现四进一出的译码等功能。(Using the Quartus2 language of EDA, the function of decoding the four into one is realized.)
mux41
- Multiplexer 4 input and 1 output for FPGA