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jisuanqi
- 用VHDL语言实现通用计算器设计,MUXPLUS2软件仿真验证-Implementation using VHDL language design generic calculator, MUXPLUS2 software simulation to verify
MUXplus2
- Max+plusⅡ是Altera公司提供的FPGA/CPLD开发集成环境,Max+plusⅡ界面友好,使用便捷,被誉为业界最易用易学的EDA软件。本资源分七节内容详细的讲解了MUX+PLUSⅡ软件的操作及应用。-Altera Max+ plus Ⅱ is provided by FPGA/CPLD development integration environment, Max+ plus Ⅱ friendly interface and easy to use, known as the ED