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quartus9.1
- 9.1版本破解！ 9.1版本破解！ -for quartus 9.1for quartus 9.1for quartus 9.1for quartus 9.1
quartusii9.1_handbook
- quartusii9.1_handbook用户手册吗，是最新版的altera fpga开发软件资料，altera官方资料，是学习altera fpga的必备资料，（全英文版）中文版我会尽快上传-quartusii9.1_handbook user manual you, is the latest version of the altera fpga software development information, altera official information is essentia
Crack_Quartus+II+9.1
- Its crack file for Altera Quartus 9.1
lab1
- 本实验主要练习使用Quartus II 9.1软件进行简单的FPGA 的I/O口实验，实验使用的是DE2开发板，使用芯片为EP2C35F672C6。本次实验的重点是掌握Quartus II 进行系统设计的流程、方法及调试技巧，并对DE2开发板的各个引脚的含义及使用有所了解。-This experiment and practice using the Quartus II 9.1 software is a simple FPGA' s I/O port experiments using
QuatersCrack
- 可以用于破解Quartus II 9.0,9.0SP2,9.1。 内部已经有说明文档。-Cracker for Quartus II 9.0,9.0SP2,9.1. Notice the readme file in it.
chengfaqi
- verilog语言编写的一个乘法器程序，是16位相乘！已通过仿真，用Quartus II 9.1 编写-a multiplier verilog language program, is 16 multiplied by! Through simulation, the Quartus II 9.1 to write
vga
- verilog语言编写的一个vga程序，是vga显示程序，用Quartus II 9.1 编写-a vga verilog language program is a vga display program, the Quartus II 9.1 to write
lcd
- verilog语言编写的一个lcd控制程序，是lcd显示程序，用Quartus II 9.1 编写-verilog language lcd control procedures, lcd display program written using the Quartus II 9.1
Code_NCO.zip
- 码数控振荡器相位累加器的位数N为32,利用verilog HDL语言在Quartus II 9.1中具体实现了载波和码NCO的设计。,The code numerically controlled oscillator phase accumulator bits N 32 verilog HDL language in the concrete realization of the design of the carrier and code NCO Quartus II 9.1.
abc
- 在Quartus II 9.1下开发FPGA/CPLD程序的使用教程操作笔记-Quartus II 9.1 developed under the operation of the FPGA/CPLD program using the tutorial notes
q_74ls138
- 在quartus II 9.1上用verilog原理图形式实现的74ls138功能的38译码器-38 of 74ls138 features achieve verilog schematic form in quartus II 9.1 decoder
FPGA_Test_Cap
- 波形采集示例源码，在Quartus II 9.1 SP2环境下编译通过。-Waveform acquisition sample source code, compiled by the Quartus II 9.1 SP2 environment.
sine-function-generator-design
- 一个正弦发生器的设计，应用于EP2C35F672C6开发板，仿真环境为Quartus II 9.1 -A sine generator design, based on EP2C35F672C6 board. Simulated in Quartus II 9.1
eluosi_game
- 使用Quartus II 9.1完成俄罗斯方块游戏，只要使用有VGA和键盘接口的FPGA开发板就行实现。操作简单，使用的是VHDL和Verilog语言-Use the Quartus II 9.1 to complete the tetris game, as long as you use a VGA and keyboard interface implementation of FPGA development board. The operation is simple, the use
fpga-fir
- 使用Quartus II 9.1完成低通FIR滤波器的实现，在任意开发板上都能实现。操作简单，使用的是VHDL和Verilog语言-Use the Quartus II 9.1 the realization of the complete low pass FIR filter, can be implemented in any development board. The operation is simple, the use of VHDL and the Verilog langua
lab_5
- Introduction to learn laboratry with altera quartus II 9.1
CNTlum
- 使用Windows7 系统，quartus ii 9.1 软件，Verilog 语言 0到9的计数，并且亮度逐渐增大(count from 0 to 9,and the lum become more and more high)
(笔记)Quartus-II-9.1完全操作教程
- Quartus II 的操作指南 新手操作指南 有详细步骤和截屏(a detailed guide of Quartus II)
quartus ii 9.0 (1)
- 按钮您就能叫你家那叫奶奶看见了就能理解你(buttonjnknjknjnjnkjn)