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LogicLock
- logiclock功能演示 用vhdl语言编写 quartus环境实现-logiclock functional demo vhdl language environment for realization of quartus
RS232_FIR
- Quartus II was a development tool of CPLD / FPGA by Altera Company. Quartus II provides a fully integrated circuit structure and has nothing with the development package environment, it has all the features of digital logic design, it is including: a
LogicLock
- 通过Quartus软件自带的工程实例——“lockmult”来熟悉Altera Quartus II逻辑锁定功能LogicLock的使用方法。-Comes through the Quartus software engineering examples- " lockmult" to become familiar with Altera Quartus II logic lock LogicLock to use.