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VHDL.rar
- 教你在Quartus II中如何实用LPM库，对与FPGA系统设计有很好指导作用,Teach you how to Quartus II in the LPM utility library, with the FPGA system design have a very good guide
USB2.0
- usb2.0 fpga程序 用vhdl语言编写 quartus环境实现 -usb2.0 fpga using vhdl language program quartus environment to achieve
fpga-pwm
- 用verilog 语言写的FPGA子程序，环境是quartus II 7.2 已经在EP1C6Q240上测试过，源码包含仿真文件和仿真结果，本程序可以直接嵌入做子程序使用。-FPGA with the verilog language written subroutines, the environment is quartus II 7.2 has been tested on EP1C6Q240, source code contains the simulation files and s
SPI
- 经典spi IP 核心 FPGA是实现有说明文档-spi IP based on fpga
EP1C3_12_5_RSV
- 基于ＦＰＧＡ的数字存储示波器，用ＶＨＤＬ实现的，压缩包里是Quartus工程。AD采样送进FPGA，存入SRAM后用DA在普通示波器上可以显示。-FPGA-based digital storage oscilloscope, using VHDL achieved compression is Quartus project bag. AD sample into FPGA, after SRAM into DA in ordinary oscilloscope can display.
word
- Code was successfully implemented within ALtera FPGA with Quartus 6.0. It presents two polish own female names: ULA and ALA whose are scrolling on the 4-columns crystal LED. When you press the switch it will turn from ULA into ALA and continue scroll
lpf
- 实现低通采样功能的vhdl代码，可在quartus里运行。-The achievement of low-pass function vhdl sample code can be run in quartus.
EP1C3_12_10_PHAS
- 基于FPGA的移相式DDS正弦信号发生器的VHDL源代码，压缩包里是在Quartus里做的工程，FPGA用的是Cyclone1C3系列-FPGA-based phase-shifting of the DDS signal generator sine VHDL source code, compressed in the bag is done in Quartus Engineering, FPGA is used Cyclone1C3 Series
stopwatch
- Quartus II工程压缩文件，是一个典型的基于FPGA的秒表工程项目，有50MHz分频、计数、译码等模块。采用VHDL语言编写。-Quartus II project files, is a typical FPGA-based project of the stopwatch, a 50MHz frequency, counting, decoding modules. Using VHDL language.
quartus-work
- 基于FPGA的VERILOG的分频器的设计，10分频设计的源代码和设计思路-Based od FPGA
URAT_VHDL
- FPGA采用模块工程文件QUARTUS II工程、ADC0809、电机控制PWM、LCD12864显示控制、UART_VHDL-FPGA module QUARTUS II project engineering documents, ADC0809, motor control PWM, LCD12864 display control, UART_VHDL
FPGA_SOPC
- FPGA/SOPC开发快速入门教程，FPGA 在复杂逻辑电路以及数字信号处理领域中扮演者越来越重要的角色，SOC（片上系统）以其低 功耗，高性能，低成本，高可靠性等优点成为嵌入式系统的发展趋势。作-QUARTUS II platform based on the VHDL language elevator system control procedures.
fpgatri
- FPGA三态门的VHDL实现。包括2种不同的实现方法。编译环境是Quartus-VHDL 3-state gate FPGA implementation. Including two kinds of different implementations. Build environment is Quartus
Spread-Spectrum-Receiver-code
- 基于FPGA的扩频接收机（直扩）vhdl编写的，最好在quartus环境运行。-FPGA-based spread spectrum receiver (DS) vhdl prepared, the best environment to run in quartus.
USBhpi
- USB FX2LP TO TI5402 HPI PORT MODE BOOT V1.0\FPGA代码(Quartus)-USB FX2LP TO TI5402 HPI PORT MODE BOOT V1.0 \ FPGA code (Quartus)
ps2
- 基于VHDL语言的fpga ps2口通讯的源程序，经验证可用，开发环境Quartus -VHDL FPGA PS2 port Quartus ii
i2c
- 基于VHDL语言的fpga I2C 口通讯的源程序，经验证可用，开发环境Quartus -VHDL FPGA I2C QUARTUS II
fifo
- 基于VHDL语言的fpga 实现FIFO 源程序，经验证可用，开发环境Quartus -VHDL FPGA FIFO QUARTUS II
FPGA_Quartus-II
- FPGA入门教程 简单介绍QuartusⅡ环境，如何在QuartusⅡ开发环境下进行FPGA硬件设计，开发流程以及建立VHDL等工程-FPGA Tutorial Brief introduction to the Quartus II environment, how the Quartus II development environment for FPGA hardware design, development process and the establishment of t
基于Quartus-II-的FPGACPLD开发
- 基于Quartus-II-的FPGACPLD开发(Development of FPGACPLD based on Quartus-II)