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SPI接口音频Codec实验
- ALTERA NIOS处理器，VHDL语言在QUARTUS编译通过，然后有C语言在NIOS SHELL下驱动，实验音频解码-Altera NIOS processor, the QUARTUS VHDL compiler, then the C language under NIOS SHELL-driven, experimental audio decoder
adda_spi
- 这个源码是用altera公司的开发工具NIOS II IDE开发的基于软核处理器的AD、DA控制程序，通过spi 核控制AD、DA的时序，实现正弦波发送和接收-this source is altera company development tools NIOS II IDE - based soft-core Office JIMMY of AD and DA control procedures, spi nuclear control AD and DA timetables to ac
three_wave
- 此源码是利用altera公司的NIOS II IDE开发的，功能是通过spi 核控制AD/DA发三角波-this source is the use of altera NIOS II IDE. function through spi nuclear control AD / DA fat triangular wave
spi
- VHDL 实现的SPI接口，在Altera EMP7128 上应用过-VHDL SPI interface, the application of Altera EMP off
altera_avalon_spi
- Altera NIOS II SPI 驱动-Altera NIOS II uart DRIVER
CC2500programmingusingAlteraFPGA
- This document gives the code for programming a CC2500 transceiver using Altera Stratix FPGA. The FPGA and CC2500 are connected through SPI mode with the FPGA as the master and CC2500 as the slave.
MTDB_SYSTEM_CD_V1.0
- ALTERA Nios II Embedded Evaluation Kit开发板制造商(terasic)提供的多媒体显示板（Terasic Multimedia Touch Panel Daughter Board (MTDB)）扩展开发包。 里为有两个开源的例子 1.MTDB_SD_Card_Audio,从SD卡中读取WAV文件然后通过DA播放，这个对不SD Card的初学者非常的有用，可以知道使用FPGA SPI来读写SD CARD。 2.MTDB_Systhesiz
SPI_IIC_design_example
- ALTERA原厂提供的例程，网上很难找到的，在MAX2系列芯片上实现过，VHDL和VERILOG两种语言编写 IIC读写程序-ALTERA provided the original routine, it is difficult to find online and in the MAX2 series chip-off, VHDL and VERILOG two languages
led
- 与串口通讯控制led（使用VHDL硬件描述语言，通过Altera QuartusII 开发）-Serial control and communications led (the use of VHDL hardware descr iption language, through the development of Altera QuartusII)
analogue-digi-ana-converter
- design and implementation of a format conversion system on the Altera NIOS board(QUARTUS) which reads an analogue input, converts it into digital data, and then does the reverse conversion back into analogue format. This will be done by taking an ana
vspi
- 一个用vhdl语言写的spi接口实例，经过altera的fpga测试可以使用。-Written in a language with vhdl spi interface to an instance, after the fpga altera test can be used.
meanFilter
- This is a variable length window averaging filter that uses an MCP3002 ADC with SPI interface to sample an analog input, and has a PWM that can be run through a low-pass filter to produce an analog output. The design was simulated in Modelsim with no
SPI_Bridge_Design_Example
- 基于ALTERA的nios2的SPI通信，文档包含整个工程，包括主从模式，很有参考价值。-Based on ALTERA' s nios2 the SPI communication, the document contains the entire project, including master-slave mode, a good reference.
SPI
- design and implement a digital system on the Altera NIOS board which will read an analogue input using MicroChip’s SPI MCP3202 12-Bit A/D converter. The 8 most significant bits of the converted data will be displayed on two seven segments of the NIOS
Altera-memory
- 这个软件是altera 芯片对SPIflash的一个控制程序，里面读写测试已经通过。-spi flash code for VHDL
spi
- Altera Cyclone SPI-slave vhdl module
SPI
- spi master code for fpga quartus altera
SPI-verilog
- spi master code for fpga quartus altera
SPI-Core_nguyen
- SPI Master Core HDL: VHDL 93 Compatibility: all FPGAs, CPLDs parameterization: - variable data width - Phase/polarity configurable - selectable buffer depth - serial clock devision due to system clock package usage: IEEE
spi-altera
- Altera SPI driver for Linux v2.13.6.