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CPLD 與 61LV256 SRAM 驱动 TFT
- CPLD 與 61LV256 SRAM 驱动 4.3 吋的 TFT,附 Verilog 語言範例.
sram读模块基于FPGA的实现
- sram读模块基于FPGA的实现 verilog源代码,sram
Verilog_SRAM.rar
- 使用Verilog写的SRAM的控制程序，仅供参考！,The use of the SRAM write Verilog the control procedures, for reference purposes only!
sram
- SRAM控制器，含整个工程 vSRAM控制器，含整个工程 SRAM控制器，含整个工程-SRAM SRAMSRAMSRAMSRAMSRAMSRAMSRAMSRAM
Verilog-SRAM
- 用verilog hdl语言编写的fpga与片外sram 的读写控制-With the verilog hdl language fpga sram chip with read and write control
ref-sdr-sdram-verilog
- SDRAM的vegilog代码，做一个SDRAM的封装成为SRAM一样进行操作。一个顶层文件下由三个模块-SDRAM
sram_controller
- sram 控制器的三种实现方案，来自xinlix工程师之手，不可多得-sram controller implementation of the three programs, from the hands of engineers xinlix, rare
interleaver
- This is a convolutional interleaver code written in verilog, the ram is sram with ram_ncs, ram_nwe, ram_noe characters.
PWM
- verilog pwm to control servo motor on quartus, with microprocessor generated from sopc and connected with sram-verilog pwm to control servo motor on quartus
sram_test
- fpga读写SRAM的VERILOG 代码-the verilog code of fpga write/read sram
FPGA2SRAM
- verilog code that can implemented on ACEX1k FPGA for a SRAM-verilog code that can implemented on ACEX1k FPGA for a SRAM
sram
- a verilog sram code. use it to manipulate sram on fpga
SRAM
- 语言：VHDL 功能：利用VHDL编程，实现FPGA对SRAMIS61LV24516的读写操作。由于是针对IS61LV24516型号进行读写的，如果不是此型号的SRAM需要对程序进行时序修改。 仿真工具：modelsim 综合工具：quartus -Language: VHDL function: the use of VHDL programming, FPGA on SRAMIS61LV24516 read and write operations. Because it
LIP2311CORE_MultiPortSRAM
- Multiport SRAM verilog source code
SRAM
- Verilog 语言描述，SRAM的实验操作，Quartus中编译通过-Verilog language descr iption, SRAM experimental operation, Quartus compiled by
chip-SRAM-communication
- Verilog编写FPGA与片外SRAM通信模块，内含源代码，希望对大家有所帮助。-FPGA in Verilog-chip SRAM with communication modules, including source code, we want to help.
SRAM芯片(read&write)
- 自己编写的针对SRAM芯片的Verilog读写程序，非常有用(I have written for SRAM chip Verilog read and write procedures, very useful)
SRAM
- SRAM读写测试实例，每秒钟进行一次单字节的SRAM 读和写操作，用chipscope查看时序波形。(SRAM read and write test instances, each time a single byte SRAM Read and write operations, use chipscope to see the timing waveform.)
sram
- FPGA 读写 SRAM 存储块，verilog代码(Read and write SRAM memory block and Verilog code in FPGA)
sram_ctr
- SRAM VERILOG 实现FPGA控制SRAM的功能。测试可以使用。(SRAM verilog fpga vivado ise quartus.)