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stopwatch.rar
- 秒表可计时，用VHDL编译的源代码，从0.1到60秒计时，解压后直接用Quartus打开project即可,Stopwatch timer can be used to compile the VHDL source code, from 0.1 to 60 seconds from time, after extracting the direct use of Quartus can open the project
stopwatch
- 基于Xilinx Spartan3E的秒表，能实现计时两次的功能-Based on the Xilinx Spartan3E stopwatch, time to achieve the functions of the two
stopwatch
- 利用Quarteus II 6.0 设计一个秒表，通过7段数码管显示，以及开关控制秒表的启停。-Quarteus II 6.0 design using a stopwatch, digital tube through 7 show, as well as the switch control of the start and stop the stopwatch.
stopwatch
- VHDL语言设计的秒表，实现计时功能，实现报时功能，并且通过硬件实验。-VHDL language design stopwatch, timer function of the realization, the realization of time functions, and through hardware experiments.
stopwatch
- 用brew 实现的stopwatch功能。用softkey控制时间的开始和停止。也实现了lap功能-Achieved with stopwatch function brew. Softkey control with start and stop time. Also achieved a lap function
StopWatch
- 一个 Java 秒表计时器，两种计时模式，可切换皮肤和语言。-A stopwatch in Java. There are two timing modes and the language and look can be changed.
stopwatch
- Quartus II工程压缩文件，是一个典型的基于FPGA的秒表工程项目，有50MHz分频、计数、译码等模块。采用VHDL语言编写。-Quartus II project files, is a typical FPGA-based project of the stopwatch, a 50MHz frequency, counting, decoding modules. Using VHDL language.
StopWatch
- 用C#写的跑表，用于学习Timer控件和C#下的stopwatch类，在VS.net 2005下运行通过.-Using C# to write the stopwatch for the study and Timer controls and C# under the stopwatch class, VS.net 2005 in the run through.
StopWatch
- Verilog 编写的 秒表程序，在数码管上显示，带有清0和暂停键-Stopwatch Implemented by Verilog hdl
stopwatch
- The program is written in verilog to accomplish functions of a stopwatch. It can be implemented in Xilinx FPGA spartan 3 board.
stopwatch
- 由flash编写，Actionscr ipt2.0. 模拟物理实验的秒表。-Stopwatch
STOPWATCH-TIME
- 利用新华龙公司C8051F020单片机及12232LCD制作的秒表计时程序可实现一次记录多个采样数据并可查询由LCD显示-Hualong company to take advantage of new C8051F020 MCU and the stopwatch time 12232LCD production process can be a record number of sampling data from the LCD display and query
stopwatch
- 基于vhdl的数字秒表，计时精度为1/100秒，最长计时时间为59分59.59秒；设有复位开关、起停开关；验证可用。-On vhdl digital stopwatch, timing accuracy of 1/100 seconds, the longest time time of 59 minutes 59.59 seconds with reset switch, start-stop switches validation is available.
stopwatch
- 51单片机与1602字符液晶构成的秒表，对初学者很有帮助的程序-51 character LCD MCU and 1602 constituted stopwatch
stopwatch
- Stopwatch which has functions as stop, reset, continue
stopwatch
- 数字秒表的VHDL代码。当设计文件加载到目标器件后，设计的数字秒表从00-00-00开始计秒。，直到按下停止按键（按键开关S2）。数码管停止计秒。按下开始按键（按键开关S1），数码管继续进行计秒。按下复位按键（核心板上复位键）秒表从00-00-00重新开始计秒。-The VHDL code for digital stopwatch. When the design document loaded into the target device, the designed digital stop
STOPWATCH
- 是基于FPGA/CPLD的跑表程序，可以存储记录多个运动员的跑步时间，是利用VHDL语言编写的，可以有助于学习EDA技术，可以参考学习，可以帮助你完成VHDL语言的课程设计。-Is based on FPGA/CPLD s stopwatch program, many athletes can store records of running time, is the use of VHDL language, and can help to learn EDA, can refer to t
Stopwatch
- 基于ATMEGA16的秒表程序，涉及到中断的应用和其他一些设置-The stopwatch program based on ATMEGA16 The application related to interrupt
stopwatch
- verilog 秒表程序 用quartus 编写-Verilog stopwatch ............................................................................................
stopwatch
- 用Verilog编写的秒表，可以实现计时、复位、暂停等功能。-stopwatch using Verilog language