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i2s_vmm
- inter IC Sound design with test bench written in Verification Methodology Manual.
sv-for-Verification-2nd
- System Verilog for Verification, 2nd Edition.非常经典的资料,供IC开发的人员作自测平台或者验证的人员使用-System Verilog for Verification, 2nd Edition. Very classic information for IC self-test platform for the development of personnel for use by or verification
sv for verification电子书
- 经典sv电子书的英文版,细致阅读会发现比中文版要好