搜索资源列表
Static_Timing_Analysis
- Altera Quartusii静态时序分析(Static Timing Analysis)基础及应用
wjnce-CAMERA
- 基于wince的底层驱动,用于生成dll的原始代码,本程序主要针对于sangsumg6410外围设备(camera)的驱动有严格的时序分析-Based on the underlying drivers wince, the original code used to generate the dll, the program aimed at sangsumg6410 peripherals (camera) driver has strict timing analysis
TimingDesigner
- 非常简单易用的画时序图工具,用于时序设计、流程分析很实用-Very easy to use timing diagram drawing tool for timing design, flow analysis is very useful
CRC
- 这个是我花了一个星期的CRC算法,有并行与串行的区别与时序的分析。。。。希望站长能够同意-This is a week I spent the CRC algorithm, there is the difference between parallel and serial and timing analysis. . . . Hope that regulators can not agree
DDR
- 关于DDR SDRAM的详细原理和时序分析,对于开发设计有很大使用价值-DDR SDRAM on detailed principles and timing analysis, design for the development of a great value
CTune0.9
- 主要用于时序分析,无论是ASIC还是FPGA以及DSP都很有效的.欢迎大家使用-Mainly used for timing analysis, whether it is ASIC or FPGA and DSP are very effective. Welcome to use
Static_Timing_Analysis
- 静态时序分析设计的经典教程书籍 全面,权威的讲解,丰富的内容举例-Static timing analysis tutorial books classic design a comprehensive, authoritative presentation, rich content, for example
StaticTimingAnalysis
- 静态时序分析(Static Timing Analysis简称STA)经由完整的分析方式判断IC是否能够在使用者的时序环境下正常工作,对确保IC质量之课题,提供一个不错的解决方案。然而,对于许多IC设计者而言,STA是个既熟悉却又陌生的名词。本文将力求以简单叙述及图例说明的方式,对STA的基础概念及其在IC设计流程中的应用做详尽的介绍。-Static timing analysis (Static Timing Analysis referred to as STA) through a com
static_time_analysis
- Static Timing Analysis is a method of computing the expected timing of a digital circuit without requiring simulation.
PrimeTime_Advanced_Timing_Analysis_User_Guide
- PrimeTime Advanced Timing Analysis User Guide
modelsim-timing-analysis
- 自己整理的一个关于如何使用modelsim进行功能仿真,时序仿真和布局布线的后仿真的文档,例子是抄的,针对的版本是modelsim se6.2b-Their finishing a feature on how to use modelsim for simulation, timing simulation and post-layout simulation of the document, copy the example is for the version of modelsim se
analysis
- 很经典的华为时序分析资料,用于电路的时序分析-Huawei is the classic time series analysis data for circuit timing analysis
Maxplus-timing-simulation
- 主要介绍Max_plus_的时序仿真与时序分析,对刚入门的很有帮助意义。-Introduced Max_plus_ timing simulation and timing analysis, meaning just getting started helpful.
Timing-analysis
- FPGA玩转Altera之时序篇,包括时序分析注意事项-Altera play the FPGA XuPian, including timing analysis the matters needing attention
Timing-Analysis
- 关于VHDL/VERILOG进行EDA设计时序分析时需要注意的一些需要注意的问题及处理策略,保证相当实用,请需要的人参考-VHDL/VERILOG the EDA design timing analysis need to pay attention to some issues that need attention and treatment strategies, guaranteed to be quite practical, please need Reference
Timing
- 国外关于时序设计的一本非常好的书,写得非常详细,包括时序的分析的原理-Abroad on timing design of a very good book, written in great detail, including the principle of timing analysis, etc.
timing
- FPGA设计时序约束及时序分析资料。详细介绍了时序约束中的基本概念、常用约束、如何分析时序等。-FPGA design timing constraints and timing analysis. Details of the timing constraints of the basic concepts, common constraints, such as how to analyze timing.
IO-timing-constrain-in-fpga
- 对FPGA的IO口的时序分析小结,能够详细理解其约束时序规则-FPGA timing analysis summary of IO port, capable of a detailed understanding of its timing constraint rules
altera-timing
- Altera时序分析基础,帮助提升时序分析能力,建立时序分析模型。-The base of Altera timing analysis.
Static Timing Analysis
- 静态时序分析,有很详细的例子和图标说明,对于FPGA工程师非常有用,对于IC工程师也非常有用!(Static timing analysis, there are very detailed examples and icon descr iptions.)