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DDS用verilog 实现,可以实现方波、正弦和三角,DDS using verilog realized, can be square wave, sinusoidal and triangular
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VHDL采用自然采样法写的SPWM,里面有正弦表,可以通过外接输入正弦波和三角波的频率。
-VHDL using written natural sampling SPWM, there are sine table, you can enter through the external sinusoidal and triangular wave frequency.
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采用vhdl语言编程,基于quartus平台的三角波仿真。-Using VHDL language programming, based on the Quartus triangular wave simulation platform.
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My project is on Direct Digital Synthesiser using Verilog HDL.This project is doing by me on july 2009 in summer training at NIT Kurukshetra, India.
This DDS system generate the square wave, Triangular wave,Sine wave and saw wave with different fre
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基于FPGA的波形信号发生器的设计和实现,利用VHDL语言实现正弦波三角波等波形信号输出-The waveform signal generator based on FPGA design and implementation, using VHDL language to realize sine wave triangular wave and waveform signal output
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