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FX2-Slave-FIFO
- 这是基于CY7C68013芯片，工作于slave FIFO模式的数据传输的程序。包括USB固件程序的程序框架和传输功能实现程序。
USB-slavefifo
- 本组程序包括FPGA程序，固件程序和上位机程序，实现USB的数据传输功能，采用Slave Fifo模式，上位机程序利用Cypress公司提供的库函数进行开发
usb
- 使用68013的测试程序，包含68013固件程序（采用slave FIFO bulk同步读写，EP2 OUT，EP6 IN），驱动，PC端测试用程序。CPLD的VHDL代码
USB and SDRAM Controller
- 基于CY7C68013A的Slave FIFO和SDRAM控制器
Verilog_CY7C68013-SLAVE-FIFO
- 用VERILOG 编写 CY7C68013 usb数据采集SLAVE FIFO模式驱动程序 ，已验证过-Prepared with the VERILOG CY7C68013 usb data acquisition SLAVE FIFO mode driver, has proven
slavefifo_VC
- 本程序基于CY7C68013开发的批量传输数据对应的应用程序（VC++）,界面具有检查设备，开始传输，停止传输等功能。数据传输方式为slave fifo。-cy7c68013
CY7C68013FPGA
- USB控制芯片cy7c68013与FPGA通过slave fifo方式通信，块传输数据-USB controller chip and FPGA cy7c68013 way communication through the slave fifo, block data transfer
USB_Interface
- verilog USB USB的slave fifo的控制-verilog USB
SJCJVC
- USB通讯Slave FIFO,包含驱动。已经调试过了，可以用。-USB communications Slave FIFO, includes driver. Have been debug can be used.
43680556EZ-USB_FX2_datasheet(Cy7C68013andCy7C68013
- ez-usb fx2 内含标准8051内核-ez-usb fx2 contains standard 8051 core
AutoFIFO
- EZ-USB的CY7C68013A实现Slave FIFO的AutoIN。关键配置见TD_Init函数。-EZ-USB
bulkloop
- EZ-USB FX2 SLAVE FIFO模式固件代码-EZ-USB FX2 SLAVE FIFO mode firmware code
usb
- USBHostSlave is a USB 1.1 host and Device IP core. – Supports full speed (12Mbps) and low speed (1.5Mbps) operation. – USB Device has four endpoints, each with their own independent FIFO. – Supports the four types of USB data transfer control,
USB-based
- 基于USB接口Slave FIFO模式的核谱数据采集研究 -Slave FIFO Interface USB-based model study of nuclear spectroscopy data acquisition
usb
- 实现USB的数据传输功能，采用Slave Fifo模式的一些资料和CY7C68013芯片的驱动程序 -USB data transfer function to achieve, by Slave Fifo mode of some of the information and the CY7C68013 chip driver
usb
- EZUSB开发总结-固件部分，包含EZUSB开发中固件设计，个人小结，适合初学者快速入门，包含FX2 Slave FIFO，Slave FIFO Firmware及一些资料 -EZUSB Development Summary- firmware part, including EZUSB development of firmware design, personal summary, quick start for beginners, including FX2 Slave FIFO, S
FX2-Slave-FIFO
- 最常用的USB数据采集系统 CY7C68013 SLAVE FIFO 模式 不需要修改，已验证过-The most common USB data acquisition system CY7C68013 SLAVE FIFO mode does not change, has been verified
CY7C68013 Slave FIFO
- CY7C68013 Slave FIFO
CCD_Array
- Interface TCD1209DG with Altera FPGA and transfer image data to PC via USB using USB FX2 Slave FIFO mode, Only FPGA code included.
usb slave fifo 测试程序 cy7c68013
- usb slave fifo altera FPGA测试程序 cy7c68013方法的示例程序！可以参考！