搜索资源列表
WAVE
- 关于波形发生功能的Verilog代码和Quartus文件完整文档。-Waveform occurred on the function of Verilog code and Quartus files a complete document.
VHDL_sin
- VHDL与Verilog示例（六） 8bit采样sine波形发生-VHDL and Verilog examples (f) 8bit sampling sine wave occurred
vhld_fpga_box
- Verilog 编写的波形发生器，可发生正弦波，三角波，方波，可以调频-Prepared Verilog waveform generator, can occur sine, triangle wave, square wave, you can FM
QIMO
- Verilog 编写的任意波形发生器，附带了顶层文件，输出波形-Verilog prepared arbitrary waveform generator, with a top-level document, the output waveform
asias_dds
- 一个简易的信号源，具有多种波形发生功能还有扫频，调制，频率计等相关功能-My project is on Direct Digital Synthesiser using Verilog HDL.This project is doing by me on july 2009 in summer training at NIT Kurukshetra, India. This DDS system generate the square wave, Triangular wave,Sine wa
LSY_wave
- 比赛时写的李萨如波形发生器的代码，用verilog写的，里面集成数据采集和DDS波形发生。-Game when writing the the Lissajous waveform generator code, written in verilog the inside integrated data acquisition and DDS waveform generation.
SIN001
- sin函数波形发生的VERILOG语言原代码-the VERILOG language original code sin function waveform generation
Verilog-HDL-based-signal-generator
- 应用Verilog进行编写四种波形发生的程序，并结合DE2板与DVCC实验板上的D/A转换器在示波器显示出波形。初步了解Verilog的编程及DE2板的应用，加强对其的实际应用操作能力。-Verilog waveform application process for the preparation of the four occurred, combined with D DE2 board and DVCC experimental board/A converter in the osci
DDS
- verilog编写，使用fpga中dds手法，可以输出任意波形的发生信号。-verilog write, use the dds fpga way, you can output an arbitrary waveform signal occurs.
wave
- 使用verilog语言实现包括正弦波、余弦波、锯齿波的发生。(Verilog realization of waveform generator)