数字设计和计算机体系结构：用verilog语言描述3-8译码器的设计与实现-Digital design and computer architecture: use verilog language describe 3-8 decoder design and implementation

3-8线译码器，输入为3位的二进制数字，进行译码，得到有效数字(3-8 wire decoder, input to 3 bits of binary digit, carry on decoding and get effective number.)