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CAN协议控制器的Verilog实现
- CAN协议控制器的Verilog实现
用verilog硬件描述语言编写的fft算法
- 用verilog硬件描述语言编写的fft算法，很是经典，和大家共享，希望能对大家有所帮助。,Verilog hardware descr iption language with the preparation of the fft algorithm, it is a classic, and we share the hope that it can be helpful to everyone.
用verilog写的对ad0809的控制
- 用verilog写的对ad0809的控制，完整工程，希望对大家能有帮助,Written using Verilog for ad0809 control, complete works, in the hope that we can help
ds18b20.ds18b20的Verilog程序
- ds18b20的Verilog程序，经测试验证可以使用。注意此版本为DALLS DS18B20而不是DS1820,注意加5K上拉电阻。,ds18b20 the Verilog process can be used to verify by testing. Note that this version rather than DALLS DS18B20 for DS1820, the attention of Canadian 5K pull-up resistor.
shift_register.用Verilog实现的移位寄存器
- 用Verilog实现的移位寄存器，可以实现左移、右移等功能,Using Verilog implementation of the shift register, you can achieve the left, shifted to right and other functions
1602LCD-Verilog
- 用FPGA控制在LCD1602上显示一段字符串。可以对LCD1602的控制有更深的了解-Using FPGA to control the LCD1602 display a string. LCD1602 can have a better understanding of the control
H.264Decoder
- H.264解码器，用verilog写成，可以在FPGA上实现baseline的264解码-H.264 decoder, written with verilog, can be achieved in the FPGA on the baseline of 264 decoding
verilog
- 基于Verilog HDL的通信系统设计一书的电子教案，里面有很多例子，大家可以参考一下-Verilog HDL-based communication system design e-book lesson plans, there are many examples we can refer to
can.tar
- can控制器IP核，verilog语言描述实现。含测试例-can controller IP core, verilog language described realize. Containing the test cases
lcd1602-verilog
- 基于QuartusII的LCD1602-Verilog 源代码，可以直接应用于FPGA开发板。-QuartusII based on the LCD1602-Verilog source code, can be directly applied to FPGA development board.
can
- 基于Verilog HDL 的一个CAN总线IP核。-Based on Verilog HDL a CAN bus IP core.
butterfly-verilog
- VHDL的DCT变换.蝶型算法,很好用的,希望能有帮助-The DCT transform VHDL. Butterfly algorithm, very good with the hope that it can be helpful
DW8051(Verilog)
- 51单片机IP核源码，可以在fpga实现，并进行仿真与验证-51 single-chip IP nuclear source, you can achieve the fpga, and simulation and verification
verilog
- 通过I2C接口读写EEPROM 在本项目中，我们利用Verilog HDL实现了部分I2C总线功能，并能够通过该总线对AT24C02进行读写操作。为了便于观察读写eeprom的结果，我们将读写的数据同时显示在七段数码管上，并设定读写的数据从0到255不断循环，这样就可以方便进行比较。 -Through the I2C interface to read and write EEPROM in this project, we use Verilog HDL to achieve some o
can-verilog
- 汽车工业系统里面的电气设备常用的总线控制-Automotive systems commonly used in electrical equipment inside the bus control
inter_prediction(verilog)
- H.264算法中的帧间估计部分的设计，能够实时处理720x576图像。-The inter predictions part design of H.264,which can process 720x576 image.
iqit(verilog)
- H.264算法中的反变换反量化部分的设计，能够实时处理720x576图像。-The IQIT part of H.264, which can process 720x576 image.
Verilog
- 该代码是Veriloghdl语言实现的串口通信，经过FPGA板子下载验证通过，读者可以使用-The code is Veriloghdl language of the serial communications, after verification by FPGA board download, readers can use
can_latest.tar
- VHDL/VERILOG FOR CAN BUS Core
verilog-CAN-protocol-realization
- CAN协议的verilog实现，欢迎大家下载-verilog CAN protocol realization, welcome to download