搜索资源列表
cf_fp_mul_c_11_52
- verilog浮点乘发器，特定数据结构，指数底为10-Verilog float by their hair, a specific data structure, the index for the end of 10
cf_fp_mul_p_5_10
- verilog浮点乘发器，特定数据结构，指数底为10,利用pipeline-Verilog float by their hair, a specific data structure, the index for the end of October, using pipeline
cf_fp_mul_p_8_23
- verilog浮点乘发器，特定数据结构，指数底为10,利用pipeline-Verilog float by their hair, a specific data structure, the index for the end of October, using pipeline
cf_fp_mul_p_11_52
- verilog浮点乘发器，特定数据结构，指数底为10-Verilog float by their hair, a specific data structure, the index for the end of 10
Verilog-float-mutiplier
- 32位浮点型乘法器，和开方器,很有用的一种，就是认真读懂-32 float mutiplier
float_mul_verilog
- 浮点乘法verilog代码，浮点格式遵循 IEEE754 标准。-Float Point Multiply , im verilog
float_div_verilog
- 浮点格式遵循 IEEE754 标准。verilog设计源代码。-float point div . in verilog design.
doublefloat_RAM
- 使用verilog编写的一个双浮点RAM，支持对字、字节、半字、双字的读写，包含testbench和wave.do文件-Use verilog to implement a double float RAM, supporting the read and write of halfword,byte,word,double word. It includes the testbench and wave.do
float
- 基于Verilog HDL的32位浮点运算加法器的源代码。-Based on the 32-bit floating point adder in Verilog HDL source code.
float
- 32位浮点加法器 verilog语言编写-32-bit floating-point adder verilog language
float
- 关于float运算的，也是用verilog写的，大家多看看，后边再上传slave的代码-The code on float arithmetic。 written by Verilog. I will upload the slave code then
cf_fp_mul_c_11_52
- verilog浮点乘发器，特定数据结构，指数底为10-Verilog float by their hair, a specific data structure, the index for the end of 10
cf_fp_mul_p_5_10
- verilog浮点乘发器，特定数据结构，指数底为10,利用pipeline-Verilog float by their hair, a specific data structure, the index for the end of October, using pipeline
cf_fp_mul_p_8_23
- verilog浮点乘发器，特定数据结构，指数底为10,利用pipeline-Verilog float by their hair, a specific data structure, the index for the end of October, using pipeline
cf_fp_mul_c_11_52
- verilog浮点乘发器，特定数据结构，指数底为10-Verilog float by their hair, a specific data structure, the index for the end of 10
cf_fp_mul_p_5_10
- verilog浮点乘发器，特定数据结构，指数底为10,利用pipeline-Verilog float by their hair, a specific data structure, the index for the end of October, using pipeline
cf_fp_mul_p_8_23
- verilog浮点乘发器，特定数据结构，指数底为10,利用pipeline-Verilog float by their hair, a specific data structure, the index for the end of October, using pipeline
float_2_int.v
- 最全的，最简单，32位浮点数转整数，32位整数转浮点数，直接可以移植，已经测试过好用。(The most complete, the simplest, 32 bit floating-point integer, 32 integer floating point number, can be directly transplanted, has been tested, easy to use.)
float_adder
- 实现可调维度的浮点数加法运算，内涵各个子模块和testbench(Able to achieve the float numbers adding operation.)