搜索资源列表
medianfilter.rar
- 基于vhdl图像处理中值滤波器，关于图像处理的好文章。呵呵,VHDL-based image processing median filter, a good deal about graphics article Ha ha
-VHDL
- 本报告分两部分： 1 由matlab计算FIR数字滤波器的滤波系数； 2 用VHDL语言设计逻辑电路，再通过QUARTUS II 软件，将各个模块的电路封装成期间，在顶层设计中通过连线，完成整个系统。 -FIR digital filters based on VHDL
ddc
- 数字下变频，vhdl代码，包含CIC和HF滤波-vhdl
median-filter
- 基于FPGA的图像中值滤波算法的优化及实现vhdl-中值滤波 利用VHDL语言实现三级流水线中值滤波-FPGA-based image filtering algorithm optimization and realization of vhdl-median filter using VHDL language three pipelined median filter
cic
- 一个很好的CIC滤波程序！可以直接使用!-CIC filter a very good program!
IIRfilterFPGA
- 介绍了IIR 滤波器的FPGA 实现方法,给出了 IIR 数字滤波器的时序控制、延时、补码乘法和累加四个模块的设计方法,并用VHDL和FPGA 器件实现了IIR 数字滤波。-Introduction of the IIR filter FPGA implementation method of IIR digital filter timing control, delay, multiplication and accumulation complement the four modules
medianfilter
- 图像滤波中的中值滤波，有效滤除椒盐噪声，使用verilog语言编写-Image filtering in the median filter, effectively filter out salt and pepper noise, using verilog language
2DImageFilterByVHDL
- 用VHDL语言编程实现2维图像的滤波算法，简单精辟-VHDL programming language used to achieve 2-D image filtering algorithm, simple brilliant
Digitalfilter
- 一篇基于FPGA的数字滤波器的小论文，附带有VHDL源码-An FPGA-based digital filter small papers, comes with VHDL source code
data
- fpga嵌入式应用之数字滤波器 里面有部分matlab+vhdl-FPGA embedded applications of digital filters there are some matlab+ vhdl
s_filter
- fpga实现图象滤波，实时的实现对输入图象的形态学滤波-FPGA realization of image filtering, real-time realization of the input images of morphological filtering
s3esk_rotary_encoder_interface
- Xilix spartan 3E 旋转编码器接口,脉冲方向识别,AB脉冲滤波 Rotary Encoder Interface Demonstrates how to use the rotary encoder portion of the rotary pushbutton switch.-Xilix spartan 3E rotary encoder interface, pulse direction identification, AB pulse filter Ro
filter
- 图像处理技术中3*3模板的滤波电路的VHDL实现.-Image processing technology in the 3* 3 template VHDL implementation of the filter circuit.
MedFilter_VHDL
- 用VHDL实现了Matlab中MedFilt1函数3阶中值滤波。进行排序时没有用软件使用的排序法，而是通过简单的比较实现。-VHDL implementation using the Matlab function MedFilt1 of 3-order median filter. Sort of no use when the software used to sort the Law, but through a simple comparison of implementation.
FIR5
- 5阶数字滤波器FIR5，包括了Textio模拟等完整设计，VHDL-5_level digital filler, including Textio simulation
lbuff_mem
- 延时代码,可以用在ＦＰＧＡ数据流水处理，图象处理，滤波-delay code
median_filter
- 实现图像中值滤波的VerilogHDL源代码-Median_filter VerilogHDL Code
ruan
- 扩频发射机，信道编码采用(2, 1, 7)卷积 码, 扩频模块采用扩频长度255 的kasami码, 极性变换模块为3bit 量化模式, 内插模块为每两比特间插入7bit 和输出滤波为16 阶的FIR 滤波器。-direct sequence spread spectrum transmitter
t1
- 实现电机M/T法测速的VHDL代码，只要修改cnt值大小即可修改M/T法切换的频率，当小于cnt时为T法，大于时为M法。-Motor M/T method velocimetry of the VHDL code, as long as the modified value of cnt to modify the size of M/T method of frequency switching, when cnt is less than for the T method, for M gr
my_lms
- 自适应滤波，对输入信号进行选择性的加权处理，使输出达到最优化，并且能够跟踪和适应系统和环境的动态变化-Least mean square，of the input signal processing, selective weighted output, and optimize can track and adapt to the dynamic changes of the system and environment