搜索资源列表
PS2-IP-CORE-VHDL
- 一个PS2 IP CORE(VHDL) for FPGA
USB 1.1 IP-CORE和设计范例 VHDL源代码
- USB 1.1 IP-CORE和设计范例 VHDL源代码-Sample program for USB1.1 IP core design, VHDL source code
IP core
- VHDL ip core的设计，软核的设计方法-VHDL core of the design, soft-core design
turbo码 IP core
- turbo码 IP core, VHDL编写，Altera公司的，用于信道编码中turbo码的译码
USB.rar
- 用VHDL实现的USB IP核，大家可以参考下,Use VHDL to achieve USB IP core, we can refer to the following
USB2.0IP.rar
- 完整的用VERILOG语言开发的USB2.0 IP核源代码,包括文档,Complete Verilog language developed by USB2.0 IP core source code, including documentation
Altera_8051_IPcore_v1.2.rar
- Alera 的8051 IP core的示例文件5个,Alera the 8051 IP core of the sample file 5
fft_verilog.rar
- FFT IP core 源码 状态控制机,FFT IP core
usb20_ipcore_usb_funct
- usb的芯片ip core. 用HDL描述，适合asic/fpga人员参考或使用。USB ip core for ASIC/FPGA designers.-usb chips ip core. with HDL descr iption suitable for asic/fpga staff reference or use. USB ip core for ASIC/FPGA designers.
8051core
- 8051 VHDL IP Core，有兴趣的可以-8051 VHDL IP Core, who are interested can
vhdl_source
- MP3 for XPLA3 XILINX.CPLD,必须在XILINX的FPGA芯片下使用,因为IP核是xilinx-MP3 for XPLA3 XILINX.CPLD, must XILINX use of FPGA chip, as is the Xilinx IP core
AVR_Core.tar
- vhdl语言编写的AVR单片机IP核，里面有testbench和说明文档。-VHDL language AVR Single Chip IP core, there are Testbench and documentation.
15-IP-core
- 15个免费的IP核 IP核源代码 -15 IP cores
fequency
- 一款可用于数字频率计设计的IP核,使用该IP核科研构建基于SOPC技术的片上数字频率计，测频范围较宽。-A digital frequency meter using IP core
vhdl-MIPS
- Quartus-Altera Nios... VHDl based, complete MIPS implementation, document, flowcharts plus code
usb20_ipcore_usb_funct
- usb 2.0协议的ip核，可用，里面程序有文档说明-usb 2.0 protocol ip core, can be used, which procedures are documented
USB-1.1-IP-CORE-VHDL
- USB1.1标准接口的IP核的实现和其设计实现的源码范例VHDL-USB1.1 standard interface IP core implementations and examples of their design and implementation of the VHDL source code
vhdl-fft-core
- FFT ip core，fft信号处理模块， VHDL语言编写-FFT ip core
uart-IP-Core
- 串口的FPGA VHDL的IP核 可以直接调用使用-Serial FPGA VHDL IP core can be called directly use
ft2232hcore_latest.tar
- ft2232 IP Core