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VHDL-vga_core(vhdl)
- VHDL-vga_core(vhdl).rar FPGA上实现 VGA的IP（VHDL）
i2c总线的vhdl实现和vxworks的文件系统.rar
- i2c总线的vhdl实现和vxworks的文件系统,i2c bus VHDL realization and VxWorks file system
sdram_vhdl_lattice.rar
- lattice sdram 控制器VHDL源代码,Sound code of Lattice Sdram Controller based on VHDL
MiniStep.rar
- XC95144步进电机驱动器源码,采用verilog vhdl开发,个人原创,XC95144 stepper motor drive source, using verilog vhdl development, personal originality
stopwatch.rar
- 秒表可计时，用VHDL编译的源代码，从0.1到60秒计时，解压后直接用Quartus打开project即可,Stopwatch timer can be used to compile the VHDL source code, from 0.1 to 60 seconds from time, after extracting the direct use of Quartus can open the project
CPU_16.rar
- vhdl语言的16b cpu代码 全部的代码我会依次上传 另有说明txt文本,VHDL language 16b cpu code all the code I will upload the text otherwise stated txt
SPI.rar
- 用VHDL语言写出SPI,内含资料和代码,VHDL language used to write SPI, containing data and code
delay.rar
- 用vhdl的状态机实现精确的1us的延时程序,VHDL state machine used to achieve precise 1us delay procedures
mouse.rar
- 用VHDL编写的鼠标控制程序，经测试运行稳定，且容易修改，升级,VHDL prepared using the mouse control procedures, have been tested to run stable, and easy to modify, upgrade
vhdl.rar
- 一个很好用的串口的VHDL实现。。quartus2编译通过,Serial port with a very good realization of VHDL. . quartus2 compiled through
DPLL(VHDL).rar
- 使用VHDL语言进行的数字锁相环的设计，里面有相关的文件，可以使用MUX+PLUS打开,The use of VHDL language of digital phase-locked loop design, there are relevant documents, you can use MUX+ PLUS Open
interleaver-vhdl.rar
- VHDL编写的基于FPGA的4-8交织器代码，有需要的下来看看,4-8 prepared VHDL code interleaver
ofdm-vhdl.rar
- ofdm的VHDL实现，包括fft,ifft,串并变换等，附详细说明文档,ofdm realization of VHDL, including the fft, ifft, such as string and transform, with detailed descr iption of the document
VHDL.rar
- 正弦信号发生器具有频率调节功能。采用VHDL编程实现。,Sinusoidal signal generator with a frequency adjustment function. Using VHDL programming.
vhdl.rar
- 该pdf 详细的介绍了 浮点小数的计算法则，和在vhdl程序中 浮点小数的表示方法，和乘除法的运用 希望对大家有用,The pdf in detail the calculation of the decimal floating-point rules, and procedures in vhdl decimal floating-point method, and the use of multiplication and division for all of us hope tha
vga_core(vhdl).rar
- vga视频输出（vhdl），主要是从sdram中产生图形，输出到vga中,vga video outputs [vhdl], mainly arising from the SDRAM graphics, output to vga Medium
motorcontrol(vhdl).rar
- 基于FPGA的直电机伺服系统的设计的代码，VHDL语言。包括前馈控制，AD1674控制模块，ADC0809控制模块，前馈控制模块，分频模块等。,FPGA-based servo system direct the design of the electrical code, VHDL language. Including feed-forward control, AD1674 control module, ADC0809 control module, feed-forward contr
VHDL.rar
- 4*4键盘扫描的VHDL程序，可消除抖动，可以帮助大家一下,4* 4 keyboard scan VHDL procedures to eliminate jitter, we can help you
VHDL
- 采用VHDL语言设计一个4通道的数据采集控制模块。系统的功能描述如下： 1.系统主时钟为100 MHz。 2.数据为16位-数据线上连续2次00FF后数据传输开始。 3.系统内部总线宽度为8位。 4.共有4个通道（ch1、ch2、ch3、ch4），每个通道配备100 Bytes的RAM，当存满数据后停止数据采集并且相应通道的状态位产生报警信号。 5.数据分为8位串行输出，输出时钟由外部数据读取电路给出。 6.具备显示模块驱动功能。由SEL信号设置显示的通道，DISPLAY
Digital System Design with VHDL
- Digital System Design with VHDL.rar