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This paper presents a low-power asynchronous implementation of the 80C51 microcontroller. It was realized in a 0.5 µ m CMOS process and it shows a power advantage of a factor 4 compared to a recent synchronous implementation in the same technolo
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FengShui: custom ASIC layout placement for gigascale VLSI circuits, for gate array, sea of gate and standard cell designs, scales well into million gate designs-FengShui: custom ASIC layout placement for gigascale VLSI circuits, for gate array, sea
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