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vspi
- verilog VSIP core,用verilog语言编写，希望对各位朋友有所帮助！
vspi
- SPI的verilog实现，非常的全面和详细，还带有spi算法的注解！
vspi
- spi总线控制器，包含vhdl和verilog两种代码方式来实现。
SPIsend.rar
- Verilog HDL的程式，上網找到SPI程式， vspi.v這程式相當好用可用來接收與傳送SPI，並且寫了一個傳輸信號測試，spidatasent.v這程式就是傳送的資料，分別為00 66... 01 77...... 02 55這樣的資料，並透過MAX+PULS II軟體進行模擬，而最外層的程式是test_createspi.v！,Verilog HDL programs, Internet find SPI program, vspi.v this very useful progra
vspi
- 一个用vhdl语言写的spi接口实例，经过altera的fpga测试可以使用。-Written in a language with vhdl spi interface to an instance, after the fpga altera test can be used.
l1ghVhVI
- The VSPI core implements an SPI interface compatible with the many -- serial EEPROMs, and microcontrollers. The VSPI core is typically used -- as an SPI master, but it can be configured as an SPI slave as well.
vspi_rx_jiance
- 对VSPI的仿真，很详尽的仿真 明白如何利用vspi-vspi
vspi
- 通用异步串行通信协议 SPI模块 VHLD语言 -SPI module
vspi
- SPI的Verilog实现带有SPI算法的注解-The implement of spi using Verilog HDL
vspi
- VSPI special module with included docs
vspi
- 比较好的一个FPGA的spi总线核-Better FPGA spi bus nuclear 。。。
vspi.v
- 实现SPI接口功能, 语言是verilog
vspi
- // Serial Peripheral Interface (SPI) // The VSPI core implements an SPI interface compatible with the many // serial EEPROMs, and microcontrollers. The VSPI core is typically used // as an SPI master, but it can be configured as an SPI slave as
vspi
- SPI串口的内核实现verilog语言和VHDL语言-The serial peripheral interface spi bus
vSPI-master
- Verilog implementation of an SPI slave interface. Intially targetted for Atlys devkit (Xilinx Spartan-6) controlled by TotalPhase Cheetah USB/SPI adapter