查看会员资料
用 户 名:胡***
发送消息- Email:用户隐藏
- Icq/MSN:
- 电话号码:
- Homepage:
- 会员简介:
最新会员发布资源
assigment3
- Construct VHDL models for 74-139 dual 2-to-4-line decoders using three descr iption styles, i.e., behavioral, dataflow and structural descr iptions. Synthesize and simulate these models respectively in the environment of Xilinx ISE with the Mod