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Dual_ram_verilog_CODE
- 写了FIFO中要用到的双口RAM的模块,FIFO中的RAM只用于读数据,输出数据,用写时针采集信号,读时针那一端不用读时针来采样.-Written to use the FIFO dual port RAM module, FIFO in the RAM is only used to read data, output data, the clock signal acquisition with write and read without reading that end of the h