资源列表
DrawRectangle
- VS2010中opencv实现自己画有角度的矩形，并用最小外接矩形算法，求矩形的几何信息，中心点，长宽，角度等-VS2010 in opencv realize their painting angled rectangle and use the minimum bounding rectangle algorithm, seeking a rectangular geometry, center, length and width, angle and so on. .
fft_IPcore
- 这是一个fft的IP核，安装要求为quartus6.0以上。解压安装后可在quartus里例化使用，元件主要为cyclone和stratix,最大支持1024点的转换。
FFTFPGAVHDLcode
- 基于VHDL的 FFT 模块的开发 fft VHDL CODE 初学者值得一看的-VHDL-based development of the FFT module fft VHDL CODE beginner to see the
ImageProcessing
- VC++gdi+的算法大集中，独一无二的好哇，快快下载吧-VC++ gdi+ centralization algorithm, unique Sure, download it quickly
campsite.tar
- Campsite是一个web发布系统,它能帮你将报纸和杂志上的内容搬到互联网上. Campsite经常被那些同样拥有印刷版形式的出版物的媒体和杂志社所使用.它能够通过在线订购和ads为媒体和杂志社增加收入 , . -Campsite is a web publishing system, it can help you the contents of the newspapers and magazines on the Internet on the move. Campsite is oft
TIchinese_A1678
- 运动检测和目标跟踪程序，一个运动检测和目标跟踪程序，程序需要在OpenCV1.0环境下使用-Motion detection and target tracking procedure, a motion detection and target tracking procedure, the program needs to OpenCV1.0 environments
BlueCatTripleEQDXSetup
- 很好的音频频谱分析软件，界面很炫，非常漂亮，希望有助于学习，欢迎下载-34/5000 Hěn hǎo de yīnpín pínpǔ fēnxī ruǎnjiàn, jièmiàn hěn xuàn, fēicháng piàoliang, xīwàng yǒu zhù yú xuéxí, huānyíng xiàzài Very good audio spectrum analysis software, the interface is very dazzling, very bea
_eTPU Development Tools
- MPC56xx 系列的 eTPU的代码配置工具和编译器，以及编程说明(MPC56xx eTPU submodule development Tools and its compiler)
Wrox.Ivor.Hortons.Beginning.Visual.C.plus.plus.20
- Beginning VC++ by Wrox Ivor Hortons. It is a really good book for beginner VC learner .
book
- 一个简单的图书管理系统，设计比较简单，仅供初学者参考 vb6+ acce-A simple library management system, the design is relatively simple for beginners reference vb6+ access
FPGA
- 基于fpga的电子密码锁的源程序代码 可实现基本的电子密码锁功能-Fpga-based electronic lock of the source code can achieve the basic function of the electronic code lock
PIPELINE
- 一个计算机原理课程设计的作业，5级流水线CPU，指令集到代码均为自己设计，有最终报告文档，组建说明，并行除法，16位字长，定长指令，Verilog源代码，顶层设计图。结构简单，冲突解决方式也很简单，代码量小。-A computer theory course design work, five pipelined CPU, instruction set to the code are design, the final report documents the formation of par