资源列表
QEP_FOR_ENCODER
- ALTERA MAX Ⅱ EPM570上QEP的源码，已经通过测试。-ALTERA MAX Ⅱ EPM570 source code on the QEP has been tested.
COUNTER
- 对外部输入的高频脉冲信号进行分频，应用于FPGA/CPLD .-External input of high-frequency pulse signal frequency, applies to FPGA/CPLD.
key_scan
- verilog 键盘扫描,数码管显示程序，没有加消抖-verilog keyboard scanning, digital tube display program, there is no increase in consumer Buffeting
UniversalRegister
- 普通的缓冲器 这种设计是一个普通的缓冲器，可以做一个直接的缓冲器，也可以做一个双向的转移缓冲器，还可以做一个递增的计数器和递减计数器-Universal Register This design is a universal register which can be used as a straightforward storage register, a bi-directional shift register, an up counter and a down counter.
main
- TMS320F2812 DSP的CAN接口测试程序！仅供参考！- TMS320F2812 DSP CAN interface test program! For reference only!
myFFT
- fft算法的实现，对刚接触dsp开发的朋友有很大的帮助-fft
MEGA128ADC
- 采用MEGA128内部AD转换器采集数据，兵通过LED数码管显示出来，是学习 MEGA128的好例子-MEGA128 internal AD converter using the data collected, soldiers come through the LED digital display, is a good example of learning MEGA128
PWM
- 实现DSP控制的PWM波生成程序！经调试完全正确！-For DSP-controlled PWM waveform generator! After debugging absolutely correct!
fft
- 本程序是DSP课程设计FFT（快速傅里叶变换），程序已将测试过-FFT source code, easy to understand, is mainly used for the DSP beginners to practice using
randomization
- 伪随机序列应用设计:利用verilog代码实现伪随机信号的产生-Pseudo-random sequence application design: the use of pseudo-random signals verilog code generation
key_led
- 基于xilinxFPGA测试通过，按键消抖动，verilog编写，控制流水灯-Based xilinxFPGA test, the key jitter elimination, verilog prepared to control water lights
iis_m_2
- iis主模块，实现并行数据转成串行数据和音频数据传输的功能。-iis main module, parallel data to serial data transfer and audio data transmission capabilities.