资源列表
zhouqixinhao
- 汇编语言编写的周期信号发生器,带有CMD文件,适合TI5000系列芯片
adder_32
- 超前进位加法器是通常数字设计所必备的,本程序为32位超前进位加法器-CLA is usually necessary for digital design, the procedure for 32-bit CLA
rs232_receiver
- VHDL implementation for an RS-232 receiver system.
clockbuffer
- clock buffer for xilinx spartan 3e
pll
- HSPICE锁相环电路,为HSPICE提供的demo程序。-HSPICE PLL circuit for HSPICE to provide the demo program.
code
- its a code which uses des binary to gray to encrpt data . this code is exclusively for a Universal FPGA Kit with Xilinx XC2S200PQ208 -its a code which uses des binary to gray to encrpt data . this code is exclusively for a Universal FPGA Kit with Xi
DCMotor
- dsp 直流电机控制程序 通过设置McBSP各管脚的工作方式和状态,可以实现将它们当成通用I/O引脚使用-dsp DC motor control procedures of the pin by setting the McBSP and status of work, you can achieve them as a general-purpose I/O pin
max3100
- max3100,使用STC89C516RD+模拟SPI通信。以实现SPI转串口通信。-max3100, use STC89C516RD+ simulation SPI communication. In order to implement the SPI serial communication.
du-li-jian-pan1
- 通过独立键盘的不同功能来控制数码管显示数字-Through the different function independent keyboard to control digital tube display digital
lopp_encoder
- 循环码编码,Verilog语言实现,带仿真程序。-Loop coding, Verilog language, with the simulation program.
sram
- 外部存储器sram驱动程序,c语言代码。-External memory sram driver, c language code.
exp2-6
- 编写程序 采用单链表表示集合,并实现两个集合的并、交和差-Programming that set a single-linked list, and realize the two collections and, pay and poor