资源列表
fifo_128x8x
- implementing first input fist output in vhdl
poc
- 可以并行的控制多个端口的POC控制器，包括打印机端口等多个端口，且波形模拟通过-Can control multiple ports in parallel POC controllers, including the printer port and other ports, and analog waveform through
vhdl-44
- 4*4 vhdl语言键盘扫描程序 无去抖-4* 4 vhdl language keyboard scanner not to shake
a
- 利用430通过定时器输出不同频率的PWM波形用以驱动蜂鸣器发音-By using 430 timer PWM output waveforms of different frequencies to drive the buzzer sounds
pic16f54
- 通过控制scr来控制交流电的通断，实现智能开关-Through the control to control the SCR ac hige, intelligent switch
D-flip-flop
- Verilog的简单D触发器设计-Simple D flip-flop in Verilog design
lab4
- 步进电机控制 1．学习并行口的使用，了解步进电机的工作原理。 2．掌握步进电机和微机的接口电路DS2003的使用方法。 3．掌握步进电机控制程序的设计，学会步进电机的编程及调试方法。 -Stepper motor control. Learning the use of the parallel port, to understand the working principle of stepper motor. Two. Grasp the stepper motor and
demo110
- 状态机，检测状态110，小演示程序，可直接运行，verilog hdl-State machine, the detection state 110, a small demo program can be run directly, verilog hdl
SFIFO_8960
- 异步FIFO设计，简单适用，非常好用，节省资源。-Applicable asynchronous FIFO
ps_transfer
- verilog HDL语言编写的8位并串转换，使用状态机实现可综合-Using verilog HDL language realize parallel-to-serial conversion, using the state machine to achieve ，can comprehense
VHDL_full_subtractor
- VHDL program_ A 4-bit subtractor by using 4 one-bit full-subtractor
frequency_cnt
- 频率计数器的设计，精确度不是很好，但是还是实现了功能。-failed to translate