资源列表
Count_4
- VHDL源码其中“music_rom”使用FPGA厂商提供的工具生成的,如Altera的Quartus II 及其宏功能生成的这些文件。 另外,我们还希望实现以下功能: * 播放音乐时,在ROM的结尾处暂停 * \"fullnote\"值为0时,表示静音 所以我们将原来的程序的最后一行从
GrayCnt
- 格雷码计数器的verilog实现,做通讯的朋友可以-Gray code counter verilog implementation, so friends can see communication
VGA_TEST
- 用verilog HDL实现的VGA接口,调试成功,能直接使用-Implemented using verilog HDL VGA interface, debugging success, can be used directly
Rake_Receiver
- 用Verilog HDL语言实现一个Rake接收机的最大比合并准则,其中3路输入数据是并行相关输出-Verilog HDL language with a Rake receiver maximum ratio combining criteria, of which 3 related to the parallel input data is output
sinA
- 求取输入角度的正弦三角函数值,并输出显示-Trigonometric sine of the angle to strike the input values and output display
PWM
- code for PWM...was made in MATLAB Simulink and write in C-Mex
FFT_Twiddles_Find_DSPrelated
- 下面是找到了基2 FFT蝴蝶旋转因子的Matlab代码。代码计算的 A 相角,在图1(c)和图2(c)所示,旋转因子的因素。我建议你开始8点DIT的FFT图1(a)通过运行代码然后运行图2中的代码为16点DIF FFT(一)。-Below is the Matlab code to find radix-2 FFT butterfly twiddle factors. The code computes the A phase angle factors that are used in t
motor
- 状态机电路,驱动步进马达的四相控制线圈A、B、C、D。马达向前 的四相控制线圈通电过程为:A-AB-B-BC-C-CD-D-DA-A…,后退的过程为A-DA-D-DC -C-BC-B-AB-A…,输入时钟信号CLK和DIR方向控制端控制马达的前进和后退。 -The state machine circuit, the driving of the stepping motor, the four-phase control coils A, B, and C, and D. The mo
WX6-5
- 利用无线电发射及接收模块结合单片机,设计一个简易的无线电遥控系统,控制P1端所接的低4位LED亮或灭-The use of radio transmitting and receiving modules combine microcontroller, design a simple radio remote control system, the control of the connected terminal P1 low 4 LED on or off
sin-of-PWM-based-on-MSP430
- MSP430F5529单片机的PWM正弦波调制波形-MSP430F5529 microcontroller PWM sinusoidal modulation waveform
KRM-lv-bo-qi
- 针对MPU60506周传感器的卡尔曼滤波器的设计-For MPU60506 week sensor Kalman filter design
SnapPhoto
- 此文件为加速度甩手拍照功能的实现算法,对于开发甩手拍照很实用。-This file for the realization of the function of acceleration pictures of cutting algorithm, for the development of cutting and taking pictures is very practical.