资源列表
fifo_sync
- 脉冲同步电路,简单修改就可以使用,很使用的.
interleaver
- 这是一个用VHDL编写的交织器程序,使用交织器能够使干扰由突发变成随机化-This is a prepared using VHDL interleaver, the use of interleaver enables interference by the sudden randomized into
TB_VHDL(adder)
- 加法器的VHDL源码及其对于的仿真Testbench 文件的编写-VHDL Code about adder for the "Simple Test Bench" example VHDL Code about adder for the "Simple Test Bench" example
ad
- Tms320lf2812 DSP模数转换测试-Testing AD components of Tms320lf2812 DSP
ArithmeticCoding
- this is use for 8-bit ALU
USB_SLAVE_700AN
- 基于verilog的USB2.0同步写操作代码-usb2.0syn write code
device_test
- a example of vhdl for epm240
vhdl
- 实现8421BCD码转换为5421BCD码求和运算-Achieve 8421BCD code into 5421BCD code summations
NetValueInd_v1
- MT4 Net value indicator
wolaapplygaincplx
- wolaapplygain 在频域中，对分析后的数据进行补偿复杂的增益，-WOLAAPPLYGAINCPLX Apply complex gains to the frequency domain data returned by an analysis step
spi
- spi slave verilog代码 spi slave verilog代码 spi slave verilog代码-spi slave verilog code spi slave verilog code spi slave verilog code
Hos
- higher order staticts in speech processing