资源列表
pmac演示运动程序
- pmac实例
NewFolder
- Verilog code for RTC
timer
- TMS320F2812 cpu_timer0_isr and GPIO is run. timer0 is run frequently. GPIO is run in timer0.
pulse_generating
- 采用VHDL语言实现输入一定的数字量，从而输出一定的频率可调的脉冲，可以与单片机接口，实现对特定对象的控制-VHDL language used to achieve a certain degree of digital input, so the frequency of certain adjustable output pulse, with the single-chip interface, the achievement of specific targets for the co
bcd_sev
- Code to display Seven Segment
ovsf
- 基于FPGA的OVSF树的设计，在WCDMA中应用比较多-OVSF tree FPGA-based design, the more WCDMA application
adda_test
- xilinx spartan3 读写adc程序-xilinx spartan3 read adc program
div
- restoring divider in verilog
RELOJES
- SHOWS HOW TO CONFIGURE A DCM ON A SPARTAN FPGA
encoder
- 基于STM32的高级定时器用作编码器测速，实现电机闭环控制-Based on the STM32 advanced timer as an encoder speed, the motor closed-loop control
non--restoring
- it is dividing non restoring algorithm implementation using verilog language.
readlcdoffset
- Programming for Reading LCD Offset(i.e. Cursor Position )