资源列表
RM68021QVGA_20090619
- RM68021用于CMO2.4”，它同ILI9325兼容，显示效果还可以。-RM68021 compatible with ILI9325.
eda2
- 一个带记数使能，同步复位，带进位输出的增一 六位二进制记数器，记数结果由共阴极七段数码管显示-One with a count enable, synchronous reset, into digital output by 16 binary counter, counting the results from the common cathode seven-segment LED display
spi_dac
- driver for spi DAC in VHDL
control
- 温度控制，是某年电子设计大赛的真题，都是我自己编的-Temperature control is an electronic design contest Zhenti years, are my own series! ! !
New-folder
- Vhdl codes for D flip flop and so
VGA_Controller
- vga的行场信号驱动，由verilog编写，需提供25M的时钟驱动，为640*480的大小。-vga signal field lines driven by the verilog writing, must provide the 25M clock drive, the size of 640* 480.
shijinzhishumaguangundongxianshi
- 数电实验作业：十进制计数的数码管滚动显示(VHDL源程序)-Decimal count digital tube scroll (VHDL source)
pso-vhdl
- i have verilog and VHDL coding. please help me.
430low-power-test
- 测试430低功耗的程序，改编自Lierda学习机的光电对管测试程序，文件有较好的注释-Test 430 low-power program, adapted from Lierda learning machine photoelectric tube test program, the file has a good comment
divider
- VERILOG编写的24位除法器代码核，是FPGA或者ASIC设计中的一核心计算模块。-VERILOG written 24 divider code nuclear FPGA or ASIC design in a core module.
FPGA_CIC
- 用Count计数法实现5级CIC滤波器，能够提前或者延迟一个周期采样。能综合-Implementation level 5 CIC filter with Count counting method, one can advance or delay the sampling period.
UniversalCar
- arduino与蓝牙的通信，内有详细注释，hc-05、hc-06等均兼容 只需修改波特率即可使用。-arduino Bluetooth communication, there are detailed notes, hc-05, hc-06 is compatible only change the baud rate etc. can be used.